Alternatives and similar repositories for riscv-smol-linux-kernel:

Users that are interested in riscv-smol-linux-kernel are comparing it to the libraries listed below

• rob-ng15 / Silice-Playground
  Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice
  ☆35Updated last year
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆26Updated 3 years ago
• fontamsoc / pu32
  ☆15Updated last year
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆26Updated 5 years ago
• Wren6991 / TwoWireDebug
  Yet Another Debug Transport
  ☆21Updated 3 years ago
• bieganski / mtkcpu
  RISC-V CPU implementation in Amaranth HDL (aka nMigen)
  ☆29Updated 7 months ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆42Updated 2 months ago
• openXC7 / openXC7-snap
  snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support
  ☆28Updated 9 months ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 2 years ago
• tommythorn / tinytapeout-4-bit-cpu
  A design for TinyTapeout
  ☆16Updated 2 years ago
• FPGAwars / FLIX-V
  FLIX-V: FPGA, Linux and RISC-V
  ☆41Updated last year
• ulixxe / usb_dfu
  Full Speed USB DFU interface for FPGA and ASIC designs
  ☆17Updated last year
• hdl-util / vga-text-mode
  VGA-compatible text mode functionality
  ☆17Updated 4 years ago
• mmicko / cross-fpga
  Cross compile FPGA tools
  ☆22Updated 4 years ago
• fallen / SucreLA
  Open source Logic Analyzer based on LiteX SoC
  ☆25Updated 2 weeks ago
• mattvenn / wishbone_buttons_leds
  simple wishbone client to read buttons and write leds
  ☆17Updated last year
• dan-rodrigues / pico-hx
  PCB combining Raspberry Pi Pico and iCE40 FPGA
  ☆32Updated 11 months ago
• hamsternz / emulate-risc-v
  A very simple RISC-V ISA emulator.
  ☆37Updated 4 years ago
• grayresearch / s3ga
  S3GA: a simple scalable serial FPGA
  ☆10Updated 2 years ago
• machdyne / lowe
  Löwe FPGA Board
  ☆12Updated last year
• mattvenn / ws2812-core
  verilog core for ws2812 leds
  ☆32Updated 3 years ago
• mmicko / prjtang
  Documenting the Anlogic FPGA bit-stream format.
  ☆86Updated 2 years ago
• xobs / lxbuildenv
  Simplified environment for litex
  ☆14Updated 4 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago
• lawrie / tiny_ram_soc
  Picorv32 SoC that uses only BRAM, not flash memory
  ☆12Updated 6 years ago
• Mr-Bossman / KISC-V
  KISCV, a KISS principle riscv32i CPU
  ☆21Updated 3 months ago
• lupyuen / nuttx-star64
  Apache NuttX RTOS for Pine64 Star64 64-bit RISC-V SBC (StarFive JH7110)
  ☆26Updated this week
• lawrie / ulx3s_bit_streams
  Bit streams forthe Ulx3s ECP5 device
  ☆17Updated 2 years ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆61Updated 6 years ago
• mattvenn / vga_clock_pcb
  Open source hardware down to the chip level!
  ☆30Updated 3 years ago