Alternatives and similar repositories for canright-aes-sboxes

Users that are interested in canright-aes-sboxes are comparing it to the libraries listed below

• isec-tugraz / coco-alma
  CocoAlma is an execution-aware tool for formal verification of masked implementations
  ☆22Updated 9 months ago
• rprimas / ascon-verilog
  Hardware Design of Ascon
  ☆23Updated this week
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆36Updated 4 years ago
• hadipourh / CryptoHDL
  A list of VHDL codes implementing cryptographic algorithms
  ☆27Updated 3 years ago
• chipsalliance / adams-bridge
  Post-Quantum Cryptography IP Core (Crystals-Dilithium)
  ☆28Updated this week
• KULeuven-COSIC / COSO-TRNG
  Reference implementation for the COherent Sampling ring Oscillator based True Random Number Generator.
  ☆13Updated 7 months ago
• chipsalliance / caliptra-rtl
  HW Design Collateral for Caliptra RoT IP
  ☆96Updated this week
• Chair-for-Security-Engineering / SILVER
  SILVER - Statistical Independence and Leakage Verification
  ☆14Updated 2 weeks ago
• ascon / ascon-hardware
  NIST LWC Hardware Reference Implementation of Ascon v1.2
  ☆26Updated last year
• proteus-core / proteus
  The SpinalHDL design of the Proteus core, an extensible RISC-V core.
  ☆54Updated last month
• Ko- / riscvcrypto
  Optimized assembly implementations of crypto for the RV32I (RISC-V) architecture
  ☆31Updated 4 years ago
• simple-crypto / SCALib
  Side-Channel Analysis Library
  ☆92Updated this week
• simple-crypto / SMAesH
  Masked Hardware AES with HPC
  ☆13Updated 8 months ago
• Chair-for-Security-Engineering / AES_masked_BRAM
  Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)
  ☆16Updated 4 years ago
• GMUCERG / LWC
  Development Package for the Hardware API for Lightweight Cryptography
  ☆16Updated 2 months ago
• gatelabdavis / SMTAttack
  SMT Attack
  ☆21Updated 4 years ago
• GMUCERG / Dilithium
  High-speed full CRYSTALS-DILITHIUM implementation on FPGA: Keygen, Sign, Verify.
  ☆56Updated 2 years ago
• draperlaboratory / hope-RIPE
  A port of the RIPE suite to RISC-V.
  ☆29Updated 6 years ago
• acmert / kyber-polmul-hw
  Hardware implementation of polynomial multiplication operation of CRYSTALS-KYBER PQC scheme
  ☆36Updated 3 years ago
• aneeshkandi14 / ascon-hw-public
  ☆21Updated 11 months ago
• lowRISC / ot-sca
  Side-channel analysis setup for OpenTitan
  ☆34Updated 3 weeks ago
• antmicro / rowhammer-tester
  ☆63Updated last month
• opentrng / ptrng
  Open-source implementations of reference Physical True Random Number Generators (TRNG or PTRNG) based on ring oscillators.
  ☆13Updated this week
• impedimentToProgress / A2
  ☆14Updated 7 years ago
• ucb-bar / sha3
  ☆81Updated last year
• Secure-Embedded-Systems / Masked-AES-Implementation
  ☆23Updated 5 years ago
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆68Updated 3 months ago
• epfl-vlsc / bitfiltrator
  Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats
  ☆42Updated 2 years ago
• pq-crypto / vpqc
  processor for post-quantum cryptography
  ☆16Updated 5 years ago
• bluespec / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆175Updated last month