Alternatives and similar repositories for PROLEAD

Users that are interested in PROLEAD are comparing it to the libraries listed below

• Chair-for-Security-Engineering / SILVER
  SILVER - Statistical Independence and Leakage Verification
  ☆14Updated 6 months ago
• isec-tugraz / coco-alma
  CocoAlma is an execution-aware tool for formal verification of masked implementations
  ☆23Updated last year
• ascon / ascon-hardware
  NIST LWC Hardware Reference Implementation of Ascon v1.2
  ☆30Updated 2 years ago
• proteus-core / proteus
  The SpinalHDL design of the Proteus core, an extensible RISC-V core.
  ☆59Updated 3 weeks ago
• simple-crypto / SCALib
  Side-Channel Analysis Library
  ☆104Updated 4 months ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆37Updated 4 years ago
• chipsalliance / caliptra-rtl
  HW Design Collateral for Caliptra RoT IP
  ☆124Updated this week
• vmarribas / VerMFi
  VerMFi: Verification tool for Masked implementations and Fault injection. Set of tools to evaluate resistance of secure hardware against …
  ☆20Updated 6 years ago
• epfl-vlsc / bitfiltrator
  Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats
  ☆48Updated 2 years ago
• mupq / pqriscv-vexriscv
  VexRiscv reference platforms for the pqriscv project
  ☆16Updated last year
• lowRISC / ot-sca
  Side-channel analysis setup for OpenTitan
  ☆37Updated last month
• antmicro / rowhammer-tester
  ☆71Updated last month
• chipsalliance / adams-bridge
  Post-Quantum Cryptography IP Core (Crystals-Dilithium)
  ☆41Updated 2 weeks ago
• coruus / canright-aes-sboxes
  David Canright's tiny AES S-boxes
  ☆28Updated 11 years ago
• hadipourh / CryptoHDL
  A list of VHDL codes implementing cryptographic algorithms
  ☆27Updated 4 years ago
• rprimas / ascon-verilog
  Hardware Design of Ascon
  ☆29Updated 2 months ago
• stnolting / fpga_puf
  Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
  ☆136Updated 3 years ago
• comsec-group / encarsia
  ☆26Updated 8 months ago
• CTSRD-CHERI / TestRIG
  Testing processors with Random Instruction Generation
  ☆50Updated last month
• newaetech / CW305-Arm-DesignStart
  Instruction and files for porting Arm DesignStart to CW305.
  ☆15Updated 2 years ago
• CTSRD-CHERI / garnet
  Amazon F1-inspired Xilinx VCU118 hardware design framework
  ☆12Updated 4 years ago
• scarv / xcrypto
  XCrypto: a cryptographic ISE for RISC-V
  ☆92Updated 2 years ago
• nils-wisiol / pypuf
  Cryptanalysis of Physically Unclonable Functions
  ☆91Updated last year
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆93Updated 2 months ago
• rzhang2285 / Coppelia
  Code repository for Coppelia tool
  ☆23Updated 5 years ago
• riscv / riscv-smmtt
  This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…
  ☆64Updated last week
• scarv / scarv
  SCARV: a side-channel hardened RISC-V platform
  ☆22Updated 4 years ago
• GMUCERG / LWC
  Development Package for the Hardware API for Lightweight Cryptography
  ☆16Updated 9 months ago
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆74Updated last month
• draperlaboratory / hope-RIPE
  A port of the RIPE suite to RISC-V.
  ☆29Updated 7 years ago