Python Verilog value change dump (VCD) parser library + the nifty vcdcat VCD command line pretty printer.
☆70Oct 19, 2025Updated 11 months ago
Alternatives and similar repositories for vcdvcd
Users that are interested in vcdvcd are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Python library for operations with VCD and other digital wave files☆55May 19, 2026Updated 4 months ago
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- A Value Change Dump (VCD) file parser and analyzer☆24Aug 27, 2020Updated 6 years ago
- tool for converting vcd(value change dump) to ate pattern.☆11Oct 22, 2015Updated 10 years ago
- Python package for writing Value Change Dump (VCD) files.☆136Aug 11, 2026Updated last month
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Simple pin assignment generator for IC case☆19Feb 14, 2017Updated 9 years ago
- converts ValueChangeDump-Files (vcd) to tikz-timing-diagrams☆17Nov 19, 2021Updated 4 years ago
- https://pypi.python.org/pypi/Verilog_VCD☆22Mar 16, 2017Updated 9 years ago
- Simulation VCD waveform viewer, using old Motif UI☆28Apr 8, 2023Updated 3 years ago
- wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.☆145Aug 23, 2026Updated 3 weeks ago
- cryptography ip-cores in vhdl / verilog☆42Feb 20, 2021Updated 5 years ago
- Collect of various scripts for helping work with EDA-tools (ASIC, FPGA, etc)☆37Jun 30, 2024Updated 2 years ago
- Python script to transform a VCD file to wavedrom format☆86Aug 18, 2022Updated 4 years ago
- Adding trace to DesignStart for easier side-channel analysis on the CW305 target. Also supports PhyWhisperer.☆18Feb 19, 2025Updated last year
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Benchoffism - Pastebin.com https://pastebin.com/t6gXBEEx Nov 17, 2015 ... 50 4B 03 04 14 00 09 00 08 00 71 57 72 47 FE 5C 70 BD 5E 10 00 …☆12Oct 21, 2018Updated 7 years ago
- A command-line tool for displaying vcd waveforms.☆72Feb 19, 2024Updated 2 years ago
- Urho3D extra minimal examples and demos. Tested in Ubuntu 18.04.☆11Feb 25, 2022Updated 4 years ago
- sample VCD files☆43Feb 13, 2026Updated 7 months ago
- Формирование спецификации, перечня элементов и ведомости покупных изделий по ЕСКД из Altium и KiCad☆13Jun 18, 2025Updated last year
- Python classes to create agnostic wave files for HDL simulator viewer☆14Updated this week
- Exploring gate level simulation☆60Mar 27, 2026Updated 5 months ago
- KiCad Test Fixture Generator☆17Mar 16, 2025Updated last year
- Source for: https://cirosantilli.com and https://ourbigbook.com/cirosantilli Build HTML with https://github.com/ourbigbook/ourbigbook wit…☆54Sep 12, 2026Updated last week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI work…☆10Jan 13, 2022Updated 4 years ago
- ☆36Mar 31, 2025Updated last year
- LiteX-based gateware for LimeSDR boards.☆22Updated this week
- Wavious DDR (WDDR) Physical interface (PHY) Hardware☆145Jul 22, 2021Updated 5 years ago
- Pure Python async code for talking to the BitScope micro☆16Aug 9, 2021Updated 5 years ago
- Git version control tutorial.☆14Aug 7, 2020Updated 6 years ago
- UVM components for DSP tasks (MODulation/DEModulation)☆16Mar 2, 2022Updated 4 years ago
- ☆37May 21, 2026Updated 3 months ago
- cocotb extension for nMigen☆17Feb 26, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- command line tool for frequent amaranth HDL tasks (generate sources, show design)☆17Dec 27, 2021Updated 4 years ago
- KiCad Library to make it easy to create both host boards and expansion boards and which are compatible with the Digilent "PMOD" specifica…☆43Mar 29, 2021Updated 5 years ago
- System-on-a-Chip for FPGA, with xr16 RISC core and LCC port☆13Jul 23, 2017Updated 9 years ago
- MOVED TO: https://cirosantilli.com#how-to-teach☆12Jul 27, 2019Updated 7 years ago
- Example of Python and PyTest powered workflow for a HDL simulation☆15Jan 17, 2021Updated 5 years ago
- Verification Template Engine is a Jinja2-based template engine targeted at verification engineers☆14Aug 31, 2026Updated 2 weeks ago
- Wavious Wlink☆12Oct 28, 2021Updated 4 years ago