Sail architecture definition language
☆956Oct 14, 2026Updated this week
Alternatives and similar repositories for sail
Users that are interested in sail are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Sail RISC-V model☆781Updated this week
- Symbolic execution tool for Sail ISA specifications☆100Sep 23, 2026Updated 3 weeks ago
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆97Jun 19, 2026Updated 3 months ago
- CHERI-RISC-V model written in Sail☆69Updated this week
- A work-in-progress language and compiler for verified low-level programming☆337Sep 22, 2026Updated 3 weeks ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Kami - a DSL for designing Hardware in Coq, and the associated semantics and theorems for proving its correctness. Kami is inspired by Bl…☆231Aug 31, 2020Updated 6 years ago
- Lem semantic definition language☆165Jun 10, 2026Updated 4 months ago
- The Vellvm (Verified LLVM) coq development.☆495Updated this week
- Semantics of x86-64 in K☆179Mar 4, 2020Updated 6 years ago
- The RiscvSpecKami package provides SiFive's RISC-V processor model. Built using Coq, this processor model can be used for simulation, mod…☆79Apr 24, 2020Updated 6 years ago
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆171Sep 17, 2026Updated 3 weeks ago
- Example implementation of Arm's Architecture Specification Language (ASL)☆63Sep 16, 2026Updated 3 weeks ago
- Verified Software Toolchain☆509Oct 3, 2026Updated last week
- Crucible is a library for symbolic simulation of imperative programs☆779Updated this week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Armv8 Native Code Symbolic Simulator in Lean☆118Jul 8, 2026Updated 3 months ago
- CakeML: A Verified Implementation of ML☆1,209Updated this week
- Bluespec Compiler (BSC)☆1,144Oct 3, 2026Updated last week
- A core language for rule-based hardware design 🦑☆187Dec 10, 2025Updated 10 months ago
- Circuit IR Compilers and Tools☆2,256Updated this week
- Rocq framework to define the semantics of CPU architectures☆39Updated this week
- Metaprogramming, verified meta-theory and implementation of Rocq in Rocq☆560Updated this week
- The CompCert formally-verified C compiler☆2,241Updated this week
- Low Level Hardware Description — A foundation for building hardware design tools.☆437Apr 20, 2022Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- The Ott tool for writing definitions of programming languages and calculi☆425Sep 16, 2026Updated 3 weeks ago
- Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)☆40Mar 30, 2021Updated 5 years ago
- Spike, a RISC-V ISA Simulator☆3,252Updated this week
- Semantic model for aspects of ELF static linking and DWARF debug information☆63Oct 3, 2026Updated last week
- RISC-V Formal Verification Framework☆633Apr 6, 2022Updated 4 years ago
- Automatic verification of LLVM optimizations☆1,184Updated this week
- Interpreter and compiler for the ISA specification language "ISA Specification Language" (ISL)☆43Aug 25, 2026Updated last month
- Creusot helps you prove your Rust code is correct.☆1,897Updated this week
- CoreIR Symbolic Analyzer☆75Oct 27, 2020Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A Library for Representing Recursive and Impure Programs in Coq☆261Jun 12, 2026Updated 4 months ago
- Formal Reasoning About Programs☆733Mar 23, 2026Updated 6 months ago
- Flexible Intermediate Representation for RTL☆747Aug 20, 2024Updated 2 years ago
- Type-checker for the λΠ-calculus modulo rewriting☆240Jul 1, 2026Updated 3 months ago
- An executable specification of the RISCV ISA in L3.☆44Mar 1, 2019Updated 7 years ago
- egg is a flexible, high-performance e-graph library☆1,843Sep 28, 2026Updated 2 weeks ago
- Tools to process ARM's Machine Readable Architecture Specification☆139Jan 1, 2020Updated 6 years ago