Alternatives and similar repositories for rcac-utils

Users that are interested in rcac-utils are comparing it to the libraries listed below

• mit-emze / cimloop
  ☆57Updated last month
• mean9park / BitFusion-verilog
  bitfusion verilog implementation
  ☆8Updated 3 years ago
• jeffreyyu0602 / quantized-training
  ☆27Updated this week
• ChengZhang-98 / llm-mixed-q
  Official implementation of EMNLP'23 paper "Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference?"
  ☆22Updated last year
• sunwoolee / lptorch
  An extention of pytorch for low precision training / inference
  ☆10Updated last year
• KULeuven-MICAS / zigzag
  HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators
  ☆150Updated 2 months ago
• neurosim / DNN_NeuroSim_V2.1
  Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)
  ☆152Updated last year
• KULeuven-MICAS / zigzag-llm
  Model LLM inference on single-core dataflow accelerators
  ☆10Updated 3 months ago
• dubcyfor3 / Prosperity
  The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity
  ☆29Updated 4 months ago
• Intelligent-Computing-Lab-Yale / SATA
  An energy simulation framework for BPTT-based SNN inference and training.
  ☆16Updated last year
• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆138Updated last week
• Sakshi09Ch / CoDeC
  [TMLR] CoDeC: Communication-Efficient Decentralized Continual Learning
  ☆12Updated last year
• neurosim / DNN_NeuroSim_V2.0
  Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)
  ☆48Updated 4 years ago
• ebby-s / MX-for-FPGA
  Implementation of Microscaling data formats in SystemVerilog.
  ☆19Updated 9 months ago
• Zhu-Zhenhua / MNSIM_Python
  MNSIM_Python_v1.0. The former circuits-level version link: https://github.com/Zhu-Zhenhua/MNSIM_V1.1
  ☆34Updated last year
• chiragsakhuja / spotlight
  ☆16Updated 2 years ago
• QianpengLi577 / Neuromorphic-Processor-paper-list
  I will share some useful or interesting papers about neuromorphic processor
  ☆25Updated 4 months ago
• pku-liang / Sanger
  A co-design architecture on sparse attention
  ☆52Updated 3 years ago
• clevercool / ANT-Quantization
  ☆98Updated last year
• cornell-zhang / FracBNN
  FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
  ☆94Updated 3 years ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 2 years ago
• Accelergy-Project / timeloop-accelergy-exercises
  Exercises for exploring the Fibertree, Timeloop and Accelergy tools
  ☆96Updated last month
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆100Updated 5 years ago
• neurosim / DNN_NeuroSim_V1.1
  Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)
  ☆21Updated 4 years ago
• ChFrenkel / ReckOn
  ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.
  ☆84Updated 3 years ago
• abdelfattah-lab / BitMoD-HPCA-25
  ☆41Updated 5 months ago
• KULeuven-MICAS / DeFiNES
  A framework for fast exploration of the depth-first scheduling space for DNN accelerators
  ☆39Updated 2 years ago
• thu-nics / MNSIM-2.0
  A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems
  ☆167Updated 6 months ago
• maestro-project / gamma
  ☆41Updated 11 months ago
• robertoBosio / NN2FPGA
  From Pytorch model to C++ for Vitis HLS
  ☆16Updated last week