Real-Time Hardware Sorter, Using A Multi-Dimensional Sorting Algorithm
☆19Jan 4, 2026Updated 5 months ago
Alternatives and similar repositories for RTHS
Users that are interested in RTHS are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs☆14Apr 1, 2020Updated 6 years ago
- C++ library for AXI DMA with direct and scatter-gather support☆13Feb 22, 2022Updated 4 years ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- Generate Rayleigh fading channel with Doppler shift effect.☆24Jul 24, 2023Updated 2 years ago
- Maltlab based software GNSS receiver for Nooelec SDR front ends☆13Mar 4, 2025Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- HDMI + GPU-pipeline + FFT☆14Mar 4, 2016Updated 10 years ago
- Official Implementation of "Opening the Blackbox: Accelerating Neural Differential Equations by Regularizing Internal Solver Heuristics" …☆25Sep 9, 2022Updated 3 years ago
- Matlab simulation of an EM algorithm based on HMM to blind channel equalization☆13Jun 16, 2018Updated 8 years ago
- ❤️ This is a Xilinx_FPGA _Spartan6 project for modulation 2ASK QPSK ADC DAC ROM SCI☆18Mar 28, 2018Updated 8 years ago
- the xoroshiro32++ and xoroshiro64++ PRNG algorthims by David Blackman and Sebastiano Vigna in C++, Verilog, VHDL and SpinalHDL.☆16Dec 2, 2018Updated 7 years ago
- Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms☆35Dec 10, 2021Updated 4 years ago
- RISCulator is a RISC-V emulator.☆12Aug 18, 2023Updated 2 years ago
- ☆10Dec 26, 2023Updated 2 years ago
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Jun 29, 2022Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- NPUEval is an LLM evaluation dataset written specifically to target AIE kernel code generation on RyzenAI hardware.☆32Nov 8, 2025Updated 7 months ago
- RISC-V BSV Specification☆24Apr 28, 2026Updated last month
- A fork of llama3.c used to do some R&D on inferencing☆23Dec 20, 2024Updated last year
- Box2D Lite C++ physics engine ported to pure GDScript☆12Aug 19, 2021Updated 4 years ago
- DVB-S2 SDR Transceiver powerded by AFF3CT & StreamPU.☆36Sep 11, 2025Updated 9 months ago
- A uuid v5 generator for godot☆10Oct 26, 2023Updated 2 years ago
- An open-source Simulation Trace Format specification☆17Jun 4, 2026Updated 2 weeks ago
- Shader for 3D hovering of UI menus in Godot.☆14Jun 4, 2025Updated last year
- 64-bit multicore Linux-capable RISC-V processor☆114Apr 28, 2025Updated last year
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Repository for work on on Xilinx's matrix vector activation unit's RTL implementation. Documentation available at: https://asadalam.githu…☆20Jan 21, 2022Updated 4 years ago
- 2024年秋季学期软件无线电实验课堂代码☆15Jan 9, 2025Updated last year
- Code for neural and behavioral data analysis from the Brain Computation and Behavior Lab, aka AyA Lab, at Cornell University.☆23May 29, 2026Updated 2 weeks ago
- 100G Udp Link For axi Stream☆16Jun 27, 2023Updated 2 years ago
- Refining continuous-in-depth neural networks☆42Nov 14, 2021Updated 4 years ago
- A static site generator that's just Pandoc and Make☆17Apr 19, 2017Updated 9 years ago
- Extension of sparse bayesian learning for mmWave near field channel estimation☆28Sep 3, 2023Updated 2 years ago
- ☆19Sep 15, 2022Updated 3 years ago
- diablo is an Out-Of-Order 64-bit RISC-V processor.☆17May 23, 2026Updated 3 weeks ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Dual-Mode PSK Transceiver on SDR With FPGA☆56Oct 9, 2024Updated last year
- Automatically exported from code.google.com/p/transducersaurus☆11Apr 1, 2015Updated 11 years ago
- An FPGA Implementation of Arbiter PUF with 4x4 Switch Blocks☆17Oct 10, 2020Updated 5 years ago
- A MATLAB function library containing encoders, decoders and weight enumerators for Reed-Muller codes.☆13Aug 19, 2023Updated 2 years ago
- Consistency checker for memory subsystem traces☆23Oct 10, 2016Updated 9 years ago
- Readings in Computer Architectures☆17Apr 27, 2026Updated last month
- Modular Verilog PCIexpress Interface Components with complete MyHDL Testbench for FPGA deployment☆14Sep 17, 2019Updated 6 years ago