Quickstart guide on Icarus Verilog.
☆41Jun 18, 2020Updated 5 years ago
Alternatives and similar repositories for iverilog-tutorial
Users that are interested in iverilog-tutorial are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A simple dot file / graph generator for Verilog syntax trees.☆23Jul 16, 2016Updated 9 years ago
- A Goldschmidt integer divider written in verilog. Similar to Newton-Raphson but the divison step can be pipelined.☆16Apr 25, 2024Updated last year
- ☆21Jan 25, 2018Updated 8 years ago
- An LLVM based mini-C to Verilog High-level Synthesis tool☆41Mar 7, 2025Updated last year
- WCH CH569 SerDes Reverse Engineering☆30Aug 13, 2022Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- This fork family includes the 6502 upgraded to 32-bit address bus, in Verilog HDL☆20Feb 23, 2020Updated 6 years ago
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- ☆23Mar 13, 2023Updated 3 years ago
- Stereo digital 2-way crossover filters processing I2S audio (16bit or 24bit) streams☆22May 13, 2024Updated last year
- Minix 1.5 source code for the Atari ST☆13Feb 8, 2016Updated 10 years ago
- Python version of tools to work with AIG formatted files☆12May 20, 2025Updated 10 months ago
- propositional satisfiability problem (SAT) goes neural and deep☆12Aug 17, 2021Updated 4 years ago
- Official repository for paper "Goal-Aware Neural SAT Solver"☆17Jun 10, 2023Updated 2 years ago
- SystemVerilog FSM generator☆35May 5, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆13Sep 21, 2020Updated 5 years ago
- 一个JPEG有损图像压缩编码器☆13May 22, 2023Updated 2 years ago
- My 32-bit RISC CPU for smallish FPGAs☆19Apr 20, 2022Updated 3 years ago
- Course Project for High Level Chip Design (高层次芯片设计)☆18Jan 2, 2025Updated last year
- RADIX-4 SRT division☆12Oct 31, 2019Updated 6 years ago
- Atom linter for Verilog/SystemVerilog, using Icarus Verilog, Slang, Verible or Verilator.☆10Jul 12, 2023Updated 2 years ago
- This repository is dedicated to providing a comprehensive guide and practical examples for using VC Formal for formal verification. Our g…☆47Mar 3, 2024Updated 2 years ago
- 大三上做的本科毕设,包含BNN的替代梯度训练,verilog电路实现,完成180nm工艺流片。☆23Jun 30, 2025Updated 9 months ago
- GPU-enabled Hardware Fuzzer using Genetic Algorithm☆20Jul 12, 2023Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆14Mar 13, 2025Updated last year
- Example design for the Ethernet FMC using an FPGA based hardware packet generator/checker to demonstrate maximum throughput☆12Apr 9, 2026Updated last week
- Circuit Toolbox for Matlab/Octave☆20Jun 18, 2015Updated 10 years ago
- Wishbone SATA Controller☆25Oct 16, 2025Updated 5 months ago
- 一个OneDark风格的Pycharm配色方案.☆12Mar 1, 2020Updated 6 years ago
- Log file scanner used with EDA tools to classify errors and warnings☆12Nov 14, 2022Updated 3 years ago
- Projects designed for PC Engine and other retro-machines, using RPi Pico or other RP2040 hardware☆29Jul 18, 2023Updated 2 years ago
- Experimental pipelined 4502 CPU design☆21Nov 29, 2017Updated 8 years ago
- ☆23Apr 7, 2026Updated last week
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- A basic implementation of a SAT attack on logic locking.☆13Jun 30, 2021Updated 4 years ago
- Determines the modules declared and instantiated in a SystemVerilog file☆51Sep 23, 2024Updated last year
- Hack@DAC 2021☆18Jul 24, 2024Updated last year
- An English dictionary.☆10May 31, 2016Updated 9 years ago
- implementation of opencv sgbm(disparity map extract) on FPGA☆12Oct 27, 2021Updated 4 years ago
- Hardware Formal Verification☆17Aug 10, 2020Updated 5 years ago
- ☆17Jul 6, 2015Updated 10 years ago