An implementation of the CORDIC algorithm in Verilog.
☆111Nov 19, 2018Updated 7 years ago
Alternatives and similar repositories for cordic
Users that are interested in cordic are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- configurable cordic core in verilog☆54Jul 17, 2014Updated 11 years ago
- CORDIC VLSI-IP for deep learning activation functions☆15Jul 13, 2019Updated 6 years ago
- The CORDIC algorithm implemented in Octave/MATLAB and Verilog☆32Mar 31, 2015Updated 11 years ago
- A project implementing the CORDIC algorithm for computing cosines and sines using fixed-point decimals in Verilog code(使用定点小数在 verilog 代码…☆11Aug 19, 2023Updated 2 years ago
- A series of CORDIC related projects☆125Nov 12, 2024Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Efficient implementations of the transcendental functions☆28Dec 9, 2016Updated 9 years ago
- ☆15Nov 11, 2015Updated 10 years ago
- ☆14Jun 30, 2019Updated 7 years ago
- Implementation of CORDIC Algorithms Using Verilog☆25Apr 26, 2021Updated 5 years ago
- A pipelined cordic algoithm for computing cos(angle) and sin(angle) in verilog☆19May 29, 2017Updated 9 years ago
- ☆21Apr 8, 2025Updated last year
- FIR implemention with Verilog☆50May 18, 2019Updated 7 years ago
- 基于STM32芯片的简易机械臂源码☆17Sep 14, 2018Updated 7 years ago
- Verilog module for calculation of FFT.☆194Aug 22, 2012Updated 13 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆76Aug 30, 2022Updated 3 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆36Sep 6, 2018Updated 7 years ago
- FIR filter implementation☆29Mar 19, 2020Updated 6 years ago
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆24Apr 25, 2025Updated last year
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆13Aug 26, 2023Updated 2 years ago
- Basic Simulink Blocks for modeling CDRs and PLLs☆16Apr 25, 2020Updated 6 years ago
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Apr 11, 2023Updated 3 years ago
- BYU Pynq PR Video Pipeline Hardware☆13Oct 2, 2025Updated 9 months ago
- High-performance FPGA-based JPEG codec accelerator☆13Dec 1, 2018Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆33Aug 31, 2020Updated 5 years ago
- DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8☆16Nov 8, 2025Updated 8 months ago
- HDMI + GPU-pipeline + FFT☆14Mar 4, 2016Updated 10 years ago
- This is verification project that we are writing SystemVerilog code to verify 8/16/32 bit SDRAM Controller Which is Originally developed …☆32Mar 26, 2017Updated 9 years ago
- CORE-V MCU UVM Environment and Test Bench☆26Jul 19, 2024Updated last year
- ☆15Sep 27, 2022Updated 3 years ago
- A Verilog implementation of a processor cache.☆40Dec 29, 2017Updated 8 years ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- Mathematical Functions in Verilog☆99Mar 7, 2021Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆47Apr 15, 2024Updated 2 years ago
- I2C controller core from Opencores.org☆27Oct 5, 2011Updated 14 years ago
- A tiny example of PCM to PDM pipeline on FPGA☆23Feb 16, 2022Updated 4 years ago
- Fixed Point Math Library for Verilog☆150Jul 17, 2014Updated 11 years ago
- A repo of basic Verilog/SystemVerilog modules useful in other circuits.☆21Nov 18, 2017Updated 8 years ago
- A collection of URLs related to High Level Synthesis (HLS).☆13Jun 26, 2021Updated 5 years ago
- Various caches written in Verilog-HDL☆133Apr 24, 2015Updated 11 years ago