Alternatives and similar repositories for puffery

Users that are interested in puffery are comparing it to the libraries listed below

• Crimsonninja / senior_design_puf
  Repository to store all design and testbench files for Senior Design
  ☆17Updated 5 years ago
• siamumar / BIST_PUF_TRNG
  A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators
  ☆23Updated 7 years ago
• esa-tu-darmstadt / tapasco-riscv
  RISC-V soft-core PEs for TaPaSCo
  ☆21Updated last year
• shalan / Chameleon_SoC
  AHB-Lite based SoC for IBEX/SWERV/VEXRISC/...
  ☆13Updated 2 months ago
• ecelab-org / Split-Chip_authentication
  An end-to-end chip authentication architecture based on SRAM PUF and public key cryptography.
  ☆17Updated 5 years ago
• eriksargent / PUF-lab
  FPGA implementation of a physical unclonable function for authentication
  ☆33Updated 8 years ago
• hplp / aes_chisel
  Implementation of the Advanced Encryption Standard in Chisel
  ☆20Updated 3 years ago
• pulp-platform / redundancy_cells
  SystemVerilog IPs and Modules for architectural redundancy designs.
  ☆14Updated last week
• jerry-D / 64-bit-Universal-Floating-Point-ISA-Compute-Engine
  RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine
  ☆22Updated 3 years ago
• Gabalo / RO_PUF
  Ring Oscillator Physically Unclonable Funtion
  ☆23Updated 3 years ago
• fatestudio / RSA4096_NEW
  ☆13Updated 10 years ago
• pulp-platform / adv_dbg_if
  Advanced Debug Interface
  ☆15Updated 5 months ago
• mupq / pqriscv-vexriscv
  VexRiscv reference platforms for the pqriscv project
  ☆16Updated last year
• pulp-platform / apb
  APB Logic
  ☆18Updated 6 months ago
• mnnuahg / StamicCGRA
  A static dataflow CGRA with dynamic dataflow execution capability
  ☆10Updated 3 years ago
• isec-tugraz / coco-alma
  CocoAlma is an execution-aware tool for formal verification of masked implementations
  ☆22Updated 9 months ago
• momalab / CoPHEE
  CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.
  ☆31Updated last year
• phthinh / soric_project
  Source-Opened RISCV for Crypto
  ☆16Updated 3 years ago
• PacoReinaCampo / MPSoC-DV
  Multi-Processor System on Chip verified with UVM/OSVVM/FV
  ☆31Updated last month
• TUM-LIS / lisnoc
  LIS Network-on-Chip Implementation
  ☆30Updated 8 years ago
• accellera-official / crave
  Constrained RAndom Verification Enviroment (CRAVE)
  ☆17Updated last year
• louislxw / pe_array
  A linear array of PEs with RISC-V ISA targeting extreme high frequency on Xilinx ZYNQ Ultrascale+, specificially for applications such as…
  ☆10Updated last year
• amamory-verification / hw-formal-verif
  Hardware Formal Verification
  ☆15Updated 4 years ago
• freecores / sha3
  SHA3 (KECCAK)
  ☆19Updated 10 years ago
• scarv / scarv-cpu
  SCARV: a side-channel hardened RISC-V platform
  ☆27Updated 2 years ago
• p4r4xor / Montgomery1024
  Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation
  ☆10Updated 5 years ago
• Chair-for-Security-Engineering / AES_masked_BRAM
  Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)
  ☆16Updated 4 years ago
• shariethernet / RPHAX
  RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…
  ☆19Updated 2 years ago
• mashahedurrahman / Security-Engine
  ☆12Updated last year
• merledu / TileLink
  TileLink Uncached Lightweight (TL-UL) implementation on Chisel.
  ☆20Updated 4 years ago