A fast VHDL language server and analysis library written in Rust
☆471Apr 4, 2026Updated last week
Alternatives and similar repositories for rust_hdl
Users that are interested in rust_hdl are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- VHDL Language Support for VSCode☆73Mar 28, 2025Updated last year
- Style guide enforcement for VHDL☆236Feb 5, 2026Updated 2 months ago
- VUnit is a unit testing framework for VHDL/SystemVerilog☆821Apr 4, 2026Updated last week
- Repurposing existing HDL tools to help writing better code☆221Jun 6, 2024Updated last year
- Streaming based VHDL parser.☆85Jul 15, 2024Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- VHDL compiler and simulator☆794Updated this week
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Jan 30, 2025Updated last year
- Language server based on ghdl☆103May 14, 2025Updated 10 months ago
- VHDL 2008/93/87 simulator☆2,790Apr 4, 2026Updated last week
- VHDL String Formatting Library☆27Apr 27, 2024Updated last year
- VHDL related news.☆27Apr 5, 2026Updated last week
- OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...☆256Updated this week
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 3 years ago
- A Sphinx domain providing VHDL language support.☆21Dec 18, 2023Updated 2 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)☆66Feb 16, 2026Updated last month
- SystemVerilog language server☆569Apr 2, 2026Updated last week
- A usable language reference for VHDL that is concise, direct, and easy to understand.☆26Sep 16, 2025Updated 6 months ago
- A VHDL Core Library.☆18Mar 29, 2017Updated 9 years ago
- Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL☆52Apr 5, 2026Updated last week
- An abstract language model of VHDL written in Python.☆64Jan 28, 2026Updated 2 months ago
- GitHub-based statistics highlighting interesting facts about the HDL industry☆12Jul 6, 2023Updated 2 years ago
- VHDL grammar for tree-sitter☆32Dec 20, 2023Updated 2 years ago
- Open Source Verification Bundle for VHDL and System Verilog☆48Jan 12, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- A JSON library implemented in VHDL.☆83Feb 8, 2026Updated 2 months ago
- Interfacing VHDL and foreign languages with VUnit☆15Feb 20, 2020Updated 6 years ago
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆425Mar 20, 2026Updated 3 weeks ago
- ☆30Jun 16, 2024Updated last year
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI work…☆10Jan 13, 2022Updated 4 years ago
- A translation of the Xilinx XPM library to VHDL for simulation purposes☆65Nov 7, 2025Updated 5 months ago
- A VHDL parser for syntax highlighting.☆21Apr 5, 2026Updated last week
- VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!☆705Dec 14, 2025Updated 3 months ago
- Trying to verify Verilog/VHDL designs with formal methods and tools☆43Mar 7, 2024Updated 2 years ago
- NordVPN Threat Protection Pro™ • AdTake your cybersecurity to the next level. Block phishing, malware, trackers, and ads. Lightweight app that works with all browsers.
- Flexible VHDL library☆196Jun 28, 2023Updated 2 years ago
- The PoC Library has been forked to github.com/VHDL/PoC. See new address below☆603Jul 30, 2025Updated 8 months ago
- SystemVerilog linter☆379Nov 6, 2025Updated 5 months ago
- VHDL synthesis (based on ghdl)☆357Mar 14, 2026Updated 3 weeks ago
- Generator for VHDL regular expression matchers☆15Jan 11, 2021Updated 5 years ago
- SystemVerilog parser library fully compliant with IEEE 1800-2017☆471Mar 30, 2026Updated last week
- A huge VHDL library for FPGA and digital ASIC development☆453Apr 3, 2026Updated last week