Alternatives and similar repositories for RISC-V-Single-Cycle-CPU

Users that are interested in RISC-V-Single-Cycle-CPU are comparing it to the libraries listed below

• Arlet / verilog-6502
  A Verilog HDL model of the MOS 6502 CPU
  ☆363Updated 2 years ago
• zephray / VerilogBoy
  A Pi emulating a GameBoy sounds cheap. What about an FPGA?
  ☆509Updated 3 years ago
• jameslzhu / riscv-card
  An unofficial assembly reference for RISC-V.
  ☆516Updated last year
• riscv-non-isa / riscv-arch-test
  ☆628Updated this week
• nickmqb / fpga_craft
  A voxel game/Minecraft clone for the iCE40 UP5K FPGA
  ☆211Updated 2 months ago
• riscv-software-src / riscv-tests
  ☆1,102Updated last month
• grantae / OpenMIPS
  A full implementation of the MIPS32 Release 1 ISA, including virtual memory, TLB, instruction and data caches, interrupts and exceptions,…
  ☆83Updated 6 years ago
• tilk / riscv-simple-sv
  A simple RISC V core for teaching
  ☆198Updated 4 years ago
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆679Updated 3 months ago
• kvakil / venus
  RISC-V instruction set simulator built for education
  ☆220Updated 3 years ago
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,144Updated 2 weeks ago
• XUANTIE-RV / openc906
  OpenXuantie - OpenC906 Core
  ☆382Updated last year
• litex-hub / linux-on-litex-vexriscv
  Linux on LiteX-VexRiscv
  ☆677Updated last week
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆1,166Updated 4 years ago
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,612Updated 4 years ago
• riscv / riscv-opcodes
  RISC-V Opcodes
  ☆824Updated this week
• fallingcat / HomebrewGPU
  HomebrewGPU is a simple ray tracing GPU built on FPGA, featuring basic ray–primitive intersection, BVH traversal, shadowing, reflection, …
  ☆219Updated 2 years ago
• gtkwave / gtkwave
  GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard …
  ☆890Updated last week
• hughperkins / cpu-tutorial
  Tutorial on building your own CPU, in Verilog
  ☆35Updated 3 years ago
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆907Updated 4 years ago
• riscv-non-isa / riscv-asm-manual
  RISC-V Assembly Programmer's Manual
  ☆1,596Updated last week
• openhwgroup / cvw
  CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…
  ☆458Updated this week
• 0BAB1 / HOLY_CORE_COURSE
  Learn how to build our own RV32I(M) core, verify it and actually use it. From scratch & with more than 200 pages of detailed tutorial wit…
  ☆319Updated this week
• riscvarchive / risc-v-getting-started-guide
  The official RISC-V getting started guide
  ☆202Updated last year
• regymm / quasiSoC
  Linux capable RISC-V SoC designed to be readable and useful.
  ☆155Updated 3 weeks ago
• RoaLogic / RV12
  RISC-V CPU Core
  ☆403Updated 6 months ago
• mathis-s / SoomRV
  A simple superscalar out-of-order RISC-V microprocessor
  ☆236Updated 10 months ago
• sergeykhbr / riscv_vhdl
  Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
  ☆678Updated 5 months ago
• ejrh / cpu
  A very primitive but hopefully self-educational CPU in Verilog
  ☆151Updated 10 years ago
• johnwinans / rvalp
  RISC-V Assembly Language Programming
  ☆243Updated last week