RaviVijay / awesome-dl-hw-resources
A curated list of awesome hardware/chip design resources for deep learning
☆34Updated 6 years ago
Alternatives and similar repositories for awesome-dl-hw-resources:
Users that are interested in awesome-dl-hw-resources are comparing it to the libraries listed below
- A curated list of awesome open source hardware design tools☆76Updated 4 months ago
- VeRLPy is an open-source python library developed to improve the digital hardware verification process by using Reinforcement Learning (R…☆25Updated 2 years ago
- ☆57Updated 3 years ago
- EE 260 Winter 2017: Advanced VLSI Design☆62Updated 8 years ago
- System Verilog code describing a fully combinational binarized neural network.☆33Updated 6 years ago
- Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.☆53Updated 7 years ago
- ☆35Updated 5 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆49Updated 4 months ago
- This repository contains all the information studied and created during the [Advanced Physical Design Using OpenLANE / SKY130](https://ww…☆16Updated 2 years ago
- A curated list of awesome resources for HDL design and verification☆146Updated last week
- Build infrastructure for class-wide tapeout for 18-224/624 Intro to Open Source Chip Design, Spring 2023☆14Updated last year
- Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)☆64Updated last month
- ☆23Updated 2 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 4 years ago
- Tutorial for integrating PyMTL and Vivado HLS☆18Updated 8 years ago
- Python interface to FPGA interchange format☆41Updated 2 years ago
- Accelerator simulation framework using nn_dataflow traces and energy, etc. post-processing☆7Updated 6 years ago
- SoCGen is a tool that automates SoC design by taking in a JSON description of the system and producing the final GDS-II. SoCGen supports …☆38Updated 4 years ago
- ☆57Updated 4 years ago
- ☆40Updated 5 years ago
- research, experimentation and implementation of hardware-agnostic accelerated DL framework☆36Updated last month
- ☆25Updated last week
- RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…☆17Updated 2 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 4 years ago
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆33Updated 6 years ago
- FPGA-based stochastic gradient descent (powered by ZipML - Low-precision machine learning on reconfigurable hardware)☆33Updated 5 years ago
- CNN accelerator☆28Updated 7 years ago
- Verilog/SystemVerilog Guide☆61Updated last year
- RISC-V ISA based 32-bit processor written in HLS☆17Updated 5 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆38Updated 3 years ago