Alternatives and similar repositories for multihead_attn_accelerator

Users that are interested in multihead_attn_accelerator are comparing it to the libraries listed below

• puccinic / Transformer_dataflow
  C++ code for HLS FPGA implementation of transformer
  ☆17Updated 10 months ago
• booniebears / CoMN
  ☆16Updated last year
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated last year
• bonanyan / attentionlego
  Attentionlego
  ☆12Updated last year
• gl9544 / vit_transformer_fpga
  ☆15Updated last year
• ECASLab / hls-fpga-accelerators
  Collection of kernel accelerators optimised for LLM execution
  ☆19Updated 3 months ago
• cjg91 / trans-fat
  An FPGA Accelerator for Transformer Inference
  ☆85Updated 3 years ago
• Linger0 / SRAM-Compute-In-Memory
  A collection of research papers on SRAM-based compute-in-memory architectures.
  ☆29Updated last year
• KULeuven-MICAS / zigzag-llm
  Model LLM inference on single-core dataflow accelerators
  ☆10Updated 4 months ago
• 19801201 / Ultra_low_power_CNN_Accelerated
  ☆10Updated 3 years ago
• neurosim / DNN_NeuroSim_V1.4
  Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)
  ☆72Updated 4 months ago
• gem5-X / TiC-SAT
  ☆17Updated 2 months ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆54Updated 3 months ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆79Updated 3 years ago
• Dazhuzhu-github / systolic-array
  verilog实现TPU中的脉动阵列计算卷积的module
  ☆121Updated 2 months ago
• BoooC / CNN-Accelerator-Based-on-Eyeriss-v2
  A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network
  ☆83Updated 4 months ago
• hazooree / LeNet-CNN-Accelerator-Hardware-for-FPGA
  An open source Verilog Based LeNet-1 Parallel CNNs Accelerator for FPGAs in Vivado 2017
  ☆18Updated 6 years ago
• skycrapers / Eva-CiM
  Code of "Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures", TCAD 2020
  ☆11Updated 4 years ago
• arasi15 / CNN-Accelerator-Implementation-based-on-Eyerissv2
  ☆113Updated 4 years ago
• Zhu-Zixuan / Bitlet-PE
  A bit-level sparsity-awared multiply-accumulate process element.
  ☆16Updated last year
• jha-lab / acceltran
  [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
  ☆49Updated last year
• BoChen-Ye / Tiny_LeViT_Hardware_Accelerator
  This is my hobby project with System Verilog to accelerate LeViT Network which contain CNN and Attention layer.
  ☆20Updated 11 months ago
• Buck008 / Transformer-Accelerator-Based-on-FPGA
  You can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size o…
  ☆179Updated last year
• VincentWang1998 / ai_on_chip_project1
  tpu-systolic-array-weight-stationary
  ☆24Updated 4 years ago
• hguq / HG-PIPE
  FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.
  ☆73Updated 5 months ago
• BUAA-CI-LAB / Literatures-on-SRAM-based-CIM
  A reading list for SRAM-based Compute-In-Memory (CIM) research.
  ☆71Updated last month
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆53Updated 3 years ago
• rgb000000 / eyeriss-chisel3
  eyeriss-chisel3
  ☆41Updated 3 years ago
• adervay1 / CIMulator
  a Computing In Memory emULATOR framework
  ☆13Updated last year
• sfu-arch / SPAGHETTI
  RTL generator for SpGEMM
  ☆12Updated 4 years ago