Alternatives and similar repositories for Algol:

Users that are interested in Algol are comparing it to the libraries listed below

• terpstra / opa
  Open Processor Architecture
  ☆26Updated 9 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated last month
• jbush001 / MiteCPU
  Minimal microprocessor
  ☆20Updated 7 years ago
• bonfireprocessor / bonfire-cpu
  FPGA optimized RISC-V (RV32IM) implemenation
  ☆34Updated 4 years ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆52Updated 3 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 5 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 3 years ago
• rob-ng15 / Silice-Playground
  Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice
  ☆35Updated last year
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆86Updated 6 years ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆42Updated 2 months ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago
• emeb / up5k_riscv
  There are many RISC V projects on iCE40. This one is mine.
  ☆15Updated 4 years ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆60Updated 6 years ago
• DaveBerkeley / serv_soc
  SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.
  ☆31Updated 4 years ago
• gtjennings1 / UPDuino-LH154Q01-Display
  Design to connect Lattice Ultraplus FPGA to LH154Q01 Display
  ☆28Updated 6 years ago
• lawrie / tiny_ram_soc
  Picorv32 SoC that uses only BRAM, not flash memory
  ☆12Updated 6 years ago
• olofk / observer
  ☆41Updated 5 years ago
• hamsternz / emulate-risc-v
  A very simple RISC-V ISA emulator.
  ☆37Updated 4 years ago
• aniketnk / circular-queue-verilog
  Implementation of a circular queue in hardware using verilog.
  ☆16Updated 6 years ago
• mattvenn / fpga-sram
  mystorm sram test
  ☆27Updated 7 years ago
• olgirard / openmsp430
  The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
  ☆63Updated 7 years ago
• Wren6991 / DOOMSoC
  A SoC for DOOM
  ☆17Updated 4 years ago
• mrisc32 / mc1
  A computer (FPGA SoC) based on the MRISC32-A1 CPU
  ☆56Updated last year
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆69Updated 2 years ago
• bobbl / rudolv
  RISC-V processor
  ☆30Updated 2 years ago
• mrisc32 / mrisc32-a1
  A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA
  ☆24Updated last year
• cliffordwolf / icotools
  Tools and Examples for IcoBoard
  ☆80Updated 3 years ago
• gundy / tinyfpga-bx-game-soc
  A PicoRV32 SoC for the TinyFPGA BX with peripherals designed for building games
  ☆22Updated 6 years ago
• haojunliu / OpenFPGA
  OpenFPGA
  ☆33Updated 7 years ago
• pbing / USB
  FPGA USB 1.1 Low-Speed Implementation
  ☆34Updated 6 years ago