AmiraGuesmi-mls / Defensive-Approximation
Implementation of our proposed defense strategy against adversarial attacks "Defensive Approximation (DA)"
☆8Updated 3 years ago
Alternatives and similar repositories for Defensive-Approximation:
Users that are interested in Defensive-Approximation are comparing it to the libraries listed below
- Heterogenous ML accelerator☆18Updated 6 months ago
- Graph-learning assisted instruction vulnerability estimation published in DATE 2020☆13Updated 4 years ago
- ☆11Updated 9 months ago
- Implementation of Input Stationary, Weight Stationary and Output Stationary dataflow for given neural network on a tiled architecture☆9Updated 5 years ago
- ☆13Updated last year
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆30Updated 3 years ago
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆12Updated 3 years ago
- ☆13Updated 4 years ago
- Computational Memory Neural Network Compiler☆11Updated 3 years ago
- ☆10Updated 6 months ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- Pytorch implementation of Bit-Flip based adversarial weight Attack (BFA)☆32Updated 3 years ago
- Fast Emulation of Approximate DNN Accelerators in PyTorch☆22Updated last year
- [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…☆15Updated 3 years ago
- A Scalable BFS Accelerator on FPGA-HBM Platform☆13Updated 3 years ago
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆34Updated last week
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆52Updated last week
- ☆15Updated 10 months ago
- ☆27Updated 2 years ago
- ☆25Updated 3 years ago
- ☆16Updated 4 years ago
- ☆8Updated last month
- ☆16Updated 2 years ago
- Approximate layers - TensorFlow extension☆27Updated last week
- Source code for the architectural and circuit-level simulators used for modeling the CROW (Copy-ROW DRAM) mechanism proposed in our ISCA …☆15Updated 5 years ago
- ☆18Updated 2 years ago
- [DATE 2025] Official implementation and dataset of AIrchitect v2: Learning the Hardware Accelerator Design Space through Unified Represen…☆14Updated 3 months ago
- ☆16Updated 2 years ago
- first-order deep learning accelerator model☆18Updated 7 years ago
- ☆12Updated 3 years ago