Alternatives and similar repositories for pifo-hardware:

Users that are interested in pifo-hardware are comparing it to the libraries listed below

• multitenancy-project / menshen
  ☆45Updated 2 years ago
• minmit / tonic
  A Programmable Hardware Architecture for Network Transport Logic
  ☆35Updated 3 years ago
• vishal1303 / PIEO-Scheduler
  A Fast, Scalable and Programmable Packet Scheduler in Hardware
  ☆38Updated 5 years ago
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆43Updated 2 years ago
• l-nic / chipyard
  An Agile Chisel-Based SoC Design Framework
  ☆26Updated 3 years ago
• NetFPGA / NetFPGA-PLUS
  ☆51Updated 9 months ago
• acsl-technion / nica
  An infrastructure for inline acceleration of network applications
  ☆30Updated 3 years ago
• utnslab / RingleaderNIC
  ☆14Updated 2 years ago
• NetSys / irn-vivado-hls
  IRN's packet processing logic synthesized using Xilinx Vivado HLS
  ☆22Updated 6 years ago
• pcie-bench / pcie-model
  ☆62Updated 2 months ago
• packet-transactions / domino-compiler
  The Domino compiler to run packet programs on pipelined switches
  ☆29Updated 3 years ago
• agsiddharth / CAL-DPDK-GEM5
  Modifications to GEM5 for running kernel bypass networking. (DPDK)
  ☆15Updated last year
• Xilinx / RecoNIC
  RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.
  ☆123Updated last month
• Xilinx / open-nic-driver
  AMD OpenNIC driver includes the Linux kernel driver
  ☆66Updated 3 months ago
• axbryd / hXDP-Artifacts
  ☆59Updated 4 years ago
• p4fpga / p4fpga
  P4-14/16 Bluespec Compiler
  ☆86Updated 7 years ago
• pcie-bench / pciebench-netfpga
  pcie-bench code for NetFPGA/VCU709 cards
  ☆35Updated 6 years ago
• esnet / esnet-smartnic-hw
  ESnet SmartNIC hardware design repository.
  ☆50Updated last week
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆101Updated 2 years ago
• anirudhSK / drmt
  ☆14Updated 7 years ago
• axbryd / FlowBlaze
  FlowBlaze: Stateful Packet Processing in Hardware
  ☆68Updated 2 years ago
• Xilinx / open-nic-dpdk
  DPDK Drivers for AMD OpenNIC
  ☆24Updated last year
• programmable-scheduling / pifo-machine
  C++ reference implementation for Push-In First-Out Queue
  ☆13Updated 8 years ago
• Winters123 / FastRMT
  Orignal code/dev history for Menshen paper (NSDI 2022), see https://github.com/multitenancy-project/menshen for official version.
  ☆26Updated 2 years ago
• engjefersonsantiago / P4HLS
  P4 compatible HLS modules
  ☆11Updated 7 years ago
• Xilinx / open-nic-shell
  AMD OpenNIC Shell includes the HDL source files
  ☆115Updated 3 months ago
• packet-transactions / banzai
  A machine model for line-rate programmable switches
  ☆24Updated 8 years ago
• pgroupATusc / fasthash
  Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020
  ☆22Updated 3 years ago
• barabanshek / Dagger
  HW/SW co-designed end-host RPC stack
  ☆20Updated 3 years ago
• acsl-technion / ntl
  Networking Template Library for Vivado HLS
  ☆28Updated 4 years ago