Alternatives and similar repositories for pifo-hardware

Users that are interested in pifo-hardware are comparing it to the libraries listed below

• vishal1303 / PIEO-Scheduler
  A Fast, Scalable and Programmable Packet Scheduler in Hardware
  ☆37Updated 6 years ago
• multitenancy-project / menshen
  ☆54Updated 3 years ago
• minmit / tonic
  A Programmable Hardware Architecture for Network Transport Logic
  ☆36Updated 4 years ago
• pcie-bench / pcie-model
  ☆72Updated 11 months ago
• l-nic / chipyard
  An Agile Chisel-Based SoC Design Framework
  ☆26Updated 4 years ago
• axbryd / hXDP-Artifacts
  ☆59Updated 5 years ago
• p4fpga / p4fpga
  P4-14/16 Bluespec Compiler
  ☆89Updated 8 years ago
• acsl-technion / nica
  An infrastructure for inline acceleration of network applications
  ☆30Updated 4 years ago
• packet-transactions / banzai
  A machine model for line-rate programmable switches
  ☆25Updated 9 years ago
• axbryd / FlowBlaze
  FlowBlaze: Stateful Packet Processing in Hardware
  ☆71Updated 3 years ago
• packet-transactions / domino-compiler
  The Domino compiler to run packet programs on pipelined switches
  ☆29Updated 4 years ago
• utnslab / RingleaderNIC
  ☆15Updated 2 years ago
• engjefersonsantiago / P4HLS
  P4 compatible HLS modules
  ☆11Updated 7 years ago
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆49Updated 2 years ago
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆105Updated 2 years ago
• efeslab / optimus-hypervisor
  ☆20Updated last week
• pcie-bench / pciebench-netfpga
  pcie-bench code for NetFPGA/VCU709 cards
  ☆43Updated 7 years ago
• WukLab / Clio
  Clio, ASPLOS'22.
  ☆78Updated 4 years ago
• WukLab / FPGA-OS
  ☆36Updated 5 years ago
• NetFPGA / NetFPGA-PLUS
  ☆55Updated last year
• axbryd / warp-artifacts
  Artifacts for ATC '22 paper "Faster Software Packet Processing on FPGA NICs with eBPF Program Warping"
  ☆17Updated 3 years ago
• anirudhSK / drmt
  ☆15Updated 8 years ago
• NetSys / irn-vivado-hls
  IRN's packet processing logic synthesized using Xilinx Vivado HLS
  ☆23Updated 7 years ago
• barabanshek / Dagger
  HW/SW co-designed end-host RPC stack
  ☆20Updated 4 years ago
• esnet / esnet-smartnic-hw
  ESnet SmartNIC hardware design repository.
  ☆60Updated this week
• acsl-technion / ntl
  Networking Template Library for Vivado HLS
  ☆28Updated 5 years ago
• Winters123 / FastRMT
  Orignal code/dev history for Menshen paper (NSDI 2022), see https://github.com/multitenancy-project/menshen for official version.
  ☆30Updated 3 years ago
• NetTLP / adapter
  An FPGA-based NetTLP adapter
  ☆26Updated 5 years ago
• Xilinx / open-nic-driver
  AMD OpenNIC driver includes the Linux kernel driver
  ☆72Updated last year
• parsa-epfl / qflex
  Quick & Flexible Rack-Scale Computer Architecture Simulator
  ☆53Updated last week