Dual-Core Out-of-Order MIPS CPU Design
☆21May 8, 2025Updated 10 months ago
Alternatives and similar repositories for 437_OoO
Users that are interested in 437_OoO are comparing it to the libraries listed below
Sorting:
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆15Feb 23, 2026Updated 2 weeks ago
- Procyon is the brightest star in the constellation of Canis Minor. But it's also the name of my RISC-V out-of-order processor.☆12Apr 6, 2023Updated 2 years ago
- Reconfigurable Computing Lab, DESE, Indian Institiute of Science☆28Jun 22, 2024Updated last year
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆21Mar 22, 2023Updated 2 years ago
- Advanced Architecture Labs with CVA6☆79Jan 16, 2024Updated 2 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆70Jun 28, 2025Updated 8 months ago
- Contains commonly used UVM components (agents, environments and tests).☆32Aug 17, 2018Updated 7 years ago
- ☆38Oct 21, 2025Updated 4 months ago
- 5 stage pipeline implementation of RISC-V 32I Processor.☆10Nov 27, 2024Updated last year
- UVM components for DSP tasks (MODulation/DEModulation)☆14Mar 2, 2022Updated 4 years ago
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆35Jan 19, 2021Updated 5 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆11May 6, 2019Updated 6 years ago
- ☆12Aug 26, 2016Updated 9 years ago
- RK0 | The Real-Time Kernel '0'☆13Updated this week
- OpenExSys_NoC a mesh-based network on chip IP.☆20Dec 1, 2023Updated 2 years ago
- Static-sized long-precision arithmetic library for use inside GPU parallelization with CUDA☆11Apr 5, 2025Updated 11 months ago
- Integrated Circuit Design - IC Design Flow and Project-Based Learning☆47Mar 1, 2026Updated last week
- LunaPnR is a place and router for integrated circuits☆47Feb 11, 2026Updated 3 weeks ago
- ☆11May 30, 2024Updated last year
- ☆11Oct 24, 2021Updated 4 years ago
- RISC-V 32-bit core for MCCI Catena 4710☆10Jul 31, 2019Updated 6 years ago
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆21Apr 25, 2025Updated 10 months ago
- ☆13Jul 28, 2022Updated 3 years ago
- a low power led watch based on ESP32 C3 & MicroPython☆11Oct 10, 2023Updated 2 years ago
- This repository presents the mixed signal design of a Counter Type/ Ramp Type ADC. The Digital part of the circuit i.e 4- bit counter is …☆11May 2, 2022Updated 3 years ago
- Wishbone to ARM AMBA 4 AXI☆16May 25, 2019Updated 6 years ago
- RTLMeter benchmark suite☆29Updated this week
- An open silicon CHERIoT Ibex microcontroller chip☆18May 23, 2025Updated 9 months ago
- Vira is a rendering and ray tracing library for space exploration and mission design purposes.☆24Nov 24, 2025Updated 3 months ago
- RTL data structure☆64Feb 20, 2026Updated 2 weeks ago
- An FPGA in your USB Port☆11Jul 1, 2021Updated 4 years ago
- ☆14Jun 7, 2021Updated 4 years ago
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆13Nov 9, 2015Updated 10 years ago
- ☆10Dec 15, 2023Updated 2 years ago
- ☆14Nov 30, 2023Updated 2 years ago
- Designing a Multi-Agent Fabric Integration Architecture to run on de10-lite FPGA.☆17Feb 2, 2026Updated last month
- Open-source AI Accelerator Stack integrating compute, memory, and software — from RTL to PyTorch.☆25Updated this week
- ☆18May 13, 2025Updated 9 months ago
- Misc utility FPGA cores☆12Mar 21, 2023Updated 2 years ago