zion-group / VerilogCodingStyle
☆63Updated 4 years ago
Alternatives and similar repositories for VerilogCodingStyle:
Users that are interested in VerilogCodingStyle are comparing it to the libraries listed below
- HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…☆96Updated last year
- Some useful documents of Synopsys☆70Updated 3 years ago
- Verilog parser, preprocessor, and related tools for the Verilog-Perl package☆130Updated last year
- AMBA bus generator including AXI, AHB, and APB☆99Updated 3 years ago
- AXI DMA 32 / 64 bits☆111Updated 10 years ago
- An AXI4 crossbar implementation in SystemVerilog☆143Updated 2 weeks ago
- Verilog极简教程☆36Updated 6 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆133Updated 10 months ago
- UVM实战随书源码☆49Updated 6 years ago
- ☆61Updated 9 years ago
- ☆147Updated 2 weeks ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆201Updated last year
- The Ultra-Low Power RISC Core☆15Updated 4 years ago
- AXI协议规范中文翻译版☆146Updated 2 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆61Updated last year
- HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.☆74Updated 7 years ago
- AXI总线连接器☆97Updated 5 years ago
- Translated SpinalHDL-Doc(v1.7.2) into Chinese☆48Updated last year
- AXI4 and AXI4-Lite interface definitions☆92Updated 4 years ago
- JSON lib in Systemverilog☆43Updated 3 years ago
- ☆64Updated 2 years ago
- AHB3-Lite Interconnect☆88Updated 11 months ago
- Use ORDT and systemRDL tools to generate C/Verilog header files, register RTL, UVM register models, and docs from compiled SystemRDL.☆68Updated 5 years ago
- a training-target implementation of rv32im, designed to be simple and easy to understand☆58Updated 3 years ago
- This is the main repository for all the examples for the book Practical UVM☆189Updated 4 years ago
- Novel GUI Based UVM Testbench Template Builder☆128Updated 4 years ago
- upgrade to e203 (a risc-v core)☆42Updated 4 years ago
- ☆36Updated 9 years ago
- ☆41Updated 2 years ago
- UVM AHB VIP☆83Updated 5 months ago