Absolute beginner's guide to the de10-nano
☆260Mar 8, 2025Updated last year
Alternatives and similar repositories for de10-nano
Users that are interested in de10-nano are comparing it to the libraries listed below
Sorting:
- 🤖 SoCFPGA: Open-Source Embedded Linux Distribution with a highly flexible build system, developed for Intel (ALTERA) SoC-FPGAs (Cyclone …☆115Oct 18, 2021Updated 4 years ago
- SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cycl…☆39Jun 9, 2021Updated 4 years ago
- Arch Linux ARM packages to run MiSTer☆26Aug 1, 2023Updated 2 years ago
- How to use the Intel JTAG primitive without using virtual JTAG☆17Oct 31, 2021Updated 4 years ago
- ECE 385 Final Project -- Ethernet on MAX10 DE10-Lite FPGA and Nios II soft processor☆13Dec 13, 2021Updated 4 years ago
- NeoGeo FPGA☆10Jul 20, 2025Updated 7 months ago
- Test for video output using the ADV7513 chip on a de10 nano board☆56Feb 14, 2019Updated 7 years ago
- Examples using the Cyclone V SoC chip☆113May 22, 2019Updated 6 years ago
- System on Chip (SoC) for the Cyclone V SoC, DE0-Nano-SoC Kit/Atlas-SoC☆13Aug 7, 2016Updated 9 years ago
- PCXT by spark2k06 deMiSTified☆20Mar 22, 2024Updated last year
- A RISC-V SoC ( Hbird e203 ) on Terasic DE10-Nano☆40Jul 29, 2020Updated 5 years ago
- All JT cores for MiSTer, including premium and beta content☆34Oct 14, 2023Updated 2 years ago
- QQSPI Pmod-compatible 32MB PSRAM module☆16Sep 14, 2023Updated 2 years ago
- A simple three-stage RISC-V CPU☆25May 4, 2021Updated 4 years ago
- The python code allows you to convert your roms to Darksoft format☆11Oct 28, 2020Updated 5 years ago
- ☆60Aug 4, 2022Updated 3 years ago
- DE10 Nano Sample Cores☆15Jun 14, 2020Updated 5 years ago
- Simple BLE demo using an iOS app (SwiftUI), an ESP32 (Python) and an FPGA (Verilog)☆16Dec 12, 2020Updated 5 years ago
- Linux development repository for socfpga☆281Updated this week
- Processor-FPGA transfer rate measurements in CycloneV-SoC☆15Nov 23, 2018Updated 7 years ago
- Intel Quartus Prime Synthesis Engine for Docker☆54Feb 19, 2024Updated 2 years ago
- Official Intel SOCFPGA U-Boot repository. Note: (1) A "RC" labeled branch is for internal active development use and customer early acces…☆118Feb 11, 2026Updated 3 weeks ago
- Advanced video digitizer add-on module for Terasic DE series FPGA development boards.☆31Jan 17, 2024Updated 2 years ago
- Tools for running FPGA vendor toolchains with Docker☆78Apr 30, 2023Updated 2 years ago
- Doom classic port to lightweight RISC‑V☆107Jul 25, 2022Updated 3 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆37Jul 2, 2023Updated 2 years ago
- ☆21Mar 13, 2024Updated last year
- Template with latest framework for MiSTer☆88Jan 13, 2026Updated last month
- BaseBoard design for QMTech Kintex 7 FPGA☆22Aug 24, 2022Updated 3 years ago
- An example of how to use Avalon interrupts on the Cyclone V FPGA☆15May 25, 2014Updated 11 years ago
- This repository contains software for BeagleWire. Docs of BeagleWire: https://beaglewire.github.io/☆11Aug 17, 2021Updated 4 years ago
- Project F brings FPGAs to life with exciting open-source designs you can build on.☆754Jan 28, 2026Updated last month
- Learning FPGA, yosys, nextpnr, and RISC-V☆3,416Nov 18, 2025Updated 3 months ago
- Programmable multichannel ADPCM decoder for FPGA☆25Dec 28, 2020Updated 5 years ago
- 80186 compatible SystemVerilog CPU core and FPGA reference design☆409Mar 22, 2024Updated last year
- Enables RFID card launching of games for MiSTer FPGA☆23Oct 15, 2022Updated 3 years ago
- KiCad design for a minimig compatible board for the QM_XC7A100T_DDR3 board.☆24Mar 26, 2023Updated 2 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆11Dec 14, 2022Updated 3 years ago
- Tool to generate documentation for Nelua source files.☆10Dec 11, 2021Updated 4 years ago