This is a brand new implement of GPGPU called Koala GPU which will be compatible with NV GPU micro architecture starting from fermi. It should be regarded as an onward work for FlexGrip Plus
☆18May 31, 2026Updated 3 months ago
Alternatives and similar repositories for Koala-GPGPU
Users that are interested in Koala-GPGPU are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SystemVerilog Implementations of CUDA/TensorCore/TPU GEMM Operations☆21Apr 12, 2026Updated 4 months ago
- ☆17Oct 9, 2023Updated 2 years ago
- This is a project created and completed by team BOOM(Beihang OO masters).This is a superscalar processor with a 13-stage out-of-order dua…☆18Sep 29, 2024Updated last year
- Open-source AI Accelerator Stack integrating compute, memory, and software — from RTL to PyTorch.☆28Aug 7, 2026Updated 3 weeks ago
- ☆20Jan 13, 2026Updated 7 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- The RTL source for AnyCore RISC-V☆33Mar 18, 2022Updated 4 years ago
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆120May 11, 2023Updated 3 years ago
- 开放验证平台NutShell Cache验证案例☆12Dec 2, 2025Updated 8 months ago
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆25Apr 25, 2025Updated last year
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 7 years ago
- DUTH RISC-V Superscalar Microprocessor☆35Oct 23, 2024Updated last year
- a scaleable ring topology network on chip (NoC) implemented in BSV☆12Oct 14, 2014Updated 11 years ago
- MIAOW2.0 FPGA implementable design☆12Oct 18, 2017Updated 8 years ago
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆56Updated this week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A fork of Xiangshan for AI☆57Updated this week
- C++ Code☆10Aug 13, 2019Updated 7 years ago
- A Heterogeneous GPU Platform for AI and Neural Graphics☆67Aug 13, 2026Updated 2 weeks ago
- RISC-V SIMD Superscalar Dual-Issue Processor☆31Apr 24, 2025Updated last year
- ☆15Apr 28, 2026Updated 4 months ago
- ☆14Jul 16, 2026Updated last month
- ☆10Dec 15, 2023Updated 2 years ago
- 自建 chisel 工程模板☆15Jul 19, 2023Updated 3 years ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆19Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A RISC-V core running Debian (and a LoongArch core running Linux).☆23Nov 24, 2025Updated 9 months ago
- ☆42Oct 12, 2025Updated 10 months ago
- Contains the code for the Flexus cycle-accurate simulator, used in QFlex.☆14Jul 14, 2026Updated last month
- Open-source AMBA CHI infrastructures (supporting Issue B, E.b)☆43Updated this week
- Gemini 30F2 (30F3 variant 00) MIPS Processor for NSCSCC2022☆11Sep 21, 2022Updated 3 years ago
- SystemC simulator of a highly customizable Nostrum network-on-chip (NoC).☆14Apr 20, 2014Updated 12 years ago
- Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus☆34May 17, 2026Updated 3 months ago
- Formal Verification of RISC V IM Processor☆11Mar 27, 2022Updated 4 years ago
- Simulator or Non-Uniform Cache Architectures☆10Aug 27, 2018Updated 8 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A Study of the SiFive Inclusive L2 Cache☆71Dec 27, 2023Updated 2 years ago
- Gem5 with PCI Express integrated.☆25Sep 29, 2018Updated 7 years ago
- CuPBoP-AMD is a CUDA translator that translates CUDA programs at NVVM IR level to HIP-compatible IR that can run on AMD GPUs.☆42Nov 19, 2023Updated 2 years ago
- GPGPU-SIM 使用篇☆14Nov 12, 2022Updated 3 years ago
- contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols☆69Aug 18, 2026Updated last week
- A survey on architectural simulators focused on CPU caches.☆16Feb 8, 2020Updated 6 years ago
- small and independent checkpoint☆12Nov 4, 2023Updated 2 years ago