wavedrom / cliLinks
CLI for WaveDrom
☆64Updated last year
Alternatives and similar repositories for cli
Users that are interested in cli are comparing it to the libraries listed below
Sorting:
- Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)☆66Updated 10 months ago
- Python script to transform a VCD file to wavedrom format☆82Updated 3 years ago
- Specification of the Wishbone SoC Interconnect Architecture☆50Updated 3 years ago
- 🔍 Zoomable Waveform viewer for the Web☆43Updated 5 years ago
- Streaming based VHDL parser.☆84Updated last year
- Verilog wishbone components☆123Updated last year
- Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL☆51Updated this week
- Simple parser for extracting VHDL documentation☆72Updated last year
- A command-line tool for displaying vcd waveforms.☆65Updated last year
- WaveDrom compatible python command line☆112Updated 2 years ago
- WAL enables programmable waveform analysis.☆163Updated last month
- HDL symbol generator☆200Updated 2 years ago
- A JSON library implemented in VHDL.☆80Updated 2 weeks ago
- ☆88Updated 2 months ago
- Sphinx Extension which generates various types of diagrams from Verilog code.☆64Updated 2 years ago
- Render waveforms inside VSCode with WaveDrom☆38Updated last month
- Building and deploying container images for open source electronic design automation (EDA)☆115Updated last year
- FuseSoC standard core library☆151Updated 3 weeks ago
- An abstract language model of VHDL written in Python.☆59Updated last month
- ☆137Updated last year
- sample VCD files☆40Updated last week
- Generate address space documentation HTML from compiled SystemRDL input☆59Updated last month
- Control and Status Register map generator for HDL projects☆128Updated 7 months ago
- GHDL Verilator Interface. A glue code generator for VHDL Verilog cosimulation.☆16Updated 8 months ago
- An open-source HDL register code generator fast enough to run in real time.☆79Updated 2 weeks ago
- VHDL-2008 Support Library☆57Updated 9 years ago
- Python package for writing Value Change Dump (VCD) files.☆128Updated last year
- Limited python / cocotb interface to Xilinx/AMD Vivado simulator.☆70Updated 3 months ago
- A translation of the Xilinx XPM library to VHDL for simulation purposes☆59Updated last month
- Spen's Official OpenOCD Mirror☆51Updated 9 months ago