Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
☆39Nov 29, 2024Updated last year
Alternatives and similar repositories for MesaBusProtocol
Users that are interested in MesaBusProtocol are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Fast & lightweight interface for running Nano Banana LLM and compact local models on your PC. Optimized for high-speed AI interactions.☆43Mar 17, 2026Updated 6 months ago
- Streaming FPGA/ASIC code generator for Google Protocol Buffers.☆19Jan 29, 2021Updated 5 years ago
- Master-thesis-final☆20Oct 9, 2023Updated 3 years ago
- open-source logic analyzer for FPGAs☆103Sep 5, 2018Updated 8 years ago
- USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL☆35Oct 15, 2024Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Triple Modular Redundancy☆33Sep 4, 2019Updated 7 years ago
- Open source Logic Analyzer based on LiteX SoC☆27Apr 12, 2025Updated last year
- NVMe-oF for Windows.☆15Feb 4, 2023Updated 3 years ago
- RISC-V processor with CPI=1 (every single instruction executed in a single clock cycle).☆23Oct 2, 2026Updated last week
- High-througput logic analyzer for FPGA☆17Oct 8, 2020Updated 6 years ago
- Open source RTL simulation acceleration on commodity hardware☆37Apr 13, 2023Updated 3 years ago
- Public repository of the data, scripts and methodology presented in the paper "Towards On-Board SAR Processing with FPGA Accelerators and…☆14Apr 12, 2023Updated 3 years ago
- The first-ever opensource soft core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers. With sta…☆99Updated this week
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆34May 15, 2023Updated 3 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Sandbox for working on HFI sensorless motor control within the SimpleFOC Library☆13May 28, 2024Updated 2 years ago
- MIL-STD-1553 <-> SPI bridge☆31Sep 4, 2018Updated 8 years ago
- A compact, configurable RISC-V core☆13Jul 31, 2025Updated last year
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆23Oct 24, 2023Updated 2 years ago
- SpaceWire☆14Jul 17, 2014Updated 12 years ago
- Gemini PDA Linux kernel v3.18 (for Debian/SailfishOS) - branch 'native' is built for debian package☆12Nov 24, 2023Updated 2 years ago
- A tiny example of PCM to PDM pipeline on FPGA☆23Feb 16, 2022Updated 4 years ago
- Add ipython magic to call python trepan☆14Aug 23, 2020Updated 6 years ago
- Automatically exported from code.google.com/p/gnsssdr☆17Mar 13, 2015Updated 11 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- an sata controller using smallest resource.☆17Feb 5, 2014Updated 12 years ago
- ☆11Aug 29, 2026Updated last month
- Decision Trees Inference☆15Apr 25, 2018Updated 8 years ago
- ☆22Mar 5, 2022Updated 4 years ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆103May 16, 2023Updated 3 years ago
- ☆16Jul 27, 2025Updated last year
- ☆12Jun 4, 2021Updated 5 years ago
- sump3 logic analyzer☆47Updated this week
- Utilities for the ECP5 FPGA☆17Aug 5, 2021Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A PID Control Simulator build with Qt.☆23Mar 27, 2018Updated 8 years ago
- A Hardware Pipeline Description Language☆60Jul 12, 2025Updated last year
- Hardware Design/Visualization/Simulation/RTLGeneration Framework☆18Oct 8, 2026Updated last week
- Modular, flexible, cross-platform workload profiling and characterization☆13Mar 1, 2021Updated 5 years ago
- PIC32MX Open-Source Toolchain☆10Feb 17, 2024Updated 2 years ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- Mirror of NeTV FPGA Verilog Code☆14Jan 21, 2012Updated 14 years ago