Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
☆35Nov 29, 2024Updated last year
Alternatives and similar repositories for MesaBusProtocol
Users that are interested in MesaBusProtocol are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Streaming FPGA/ASIC code generator for Google Protocol Buffers.☆19Jan 29, 2021Updated 5 years ago
- open-source logic analyzer for FPGAs☆101Sep 5, 2018Updated 7 years ago
- USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL☆32Oct 15, 2024Updated last year
- Master-thesis-final☆19Oct 9, 2023Updated 2 years ago
- Triple Modular Redundancy☆30Sep 4, 2019Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Design 200M equivalent sampling using 1M Sa/s, send AD data to STM32. 使用1M采样率实现200M等效采样，将数据发送到STM32上 Altera FPGA EP4CE22E22C8, ADS828E☆14Aug 8, 2025Updated 8 months ago
- Open source Logic Analyzer based on LiteX SoC☆27Apr 12, 2025Updated last year
- NVMe-oF for Windows.☆14Feb 4, 2023Updated 3 years ago
- MBLANC: mini Board Lab and Companion☆11Jan 5, 2023Updated 3 years ago
- RISC-V processor with CPI=1 (every single instruction executed in a single clock cycle).☆22Apr 4, 2026Updated last week
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆28Jul 11, 2024Updated last year
- an sata controller using smallest resource.☆17Feb 5, 2014Updated 12 years ago
- 野火STM32H743 挑战者开发板 教程配套代码☆15Sep 2, 2020Updated 5 years ago
- Public repository of the data, scripts and methodology presented in the paper "Towards On-Board SAR Processing with FPGA Accelerators and…☆13Apr 12, 2023Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- High-througput logic analyzer for FPGA☆16Oct 8, 2020Updated 5 years ago
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆32May 15, 2023Updated 2 years ago
- A compact, configurable RISC-V core☆13Jul 31, 2025Updated 8 months ago
- Open source RTL simulation acceleration on commodity hardware☆35Apr 13, 2023Updated 3 years ago
- Some materials and sample source for RV32 OS projects.☆22May 31, 2022Updated 3 years ago
- Sandbox for working on HFI sensorless motor control within the SimpleFOC Library☆13May 28, 2024Updated last year
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆23Oct 24, 2023Updated 2 years ago
- There are many RISC V projects on iCE40. This one is mine.☆15Jun 25, 2020Updated 5 years ago
- MIL-STD-1553 <-> SPI bridge☆31Sep 4, 2018Updated 7 years ago
- Deploy open-source AI quickly and easily - Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆64Jul 21, 2020Updated 5 years ago
- Gemini PDA Linux kernel v3.18 (for Debian/SailfishOS) - branch 'native' is built for debian package☆12Nov 24, 2023Updated 2 years ago
- ☆14Jul 28, 2022Updated 3 years ago
- ☆12Jun 4, 2021Updated 4 years ago
- Add ipython magic to call python trepan☆14Aug 23, 2020Updated 5 years ago
- Automatically exported from code.google.com/p/gnsssdr☆17Mar 13, 2015Updated 11 years ago
- ☆16Jan 23, 2025Updated last year
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆57Mar 13, 2025Updated last year
- Decision Trees Inference☆14Apr 25, 2018Updated 7 years ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆10Oct 23, 2016Updated 9 years ago
- ☆22Mar 5, 2022Updated 4 years ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆37Feb 23, 2025Updated last year
- A tiny example of PCM to PDM pipeline on FPGA☆22Feb 16, 2022Updated 4 years ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆102May 16, 2023Updated 2 years ago
- Experimental breakout board for a signle 200-ball WFBGA LPDDR4 chip in SO-DIMM DDR4 form factor.☆20Dec 11, 2025Updated 4 months ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆29Aug 16, 2021Updated 4 years ago