Design of a 16-Bit CPU using Verilog
☆48Jun 11, 2019Updated 7 years ago
Alternatives and similar repositories for 16-Bit-CPU-using-Verilog
Users that are interested in 16-Bit-CPU-using-Verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆18Aug 8, 2017Updated 9 years ago
- Verilog implementation of various types of CPUs☆91Sep 27, 2019Updated 6 years ago
- Build a SystemVerilog Environment for an ALU, using OOP testbench components as; stimulus generator, driver, monitor, scoreboard. ALU was…☆10Mar 4, 2023Updated 3 years ago
- A 16-bit Reduced Instruction Set Computing(RISC) processor capable of fetching and executing a set of 16-bit machine instructions.☆22Apr 4, 2024Updated 2 years ago
- Little handy Numerically controlled oscillator (NCO) Verilog RTL☆15Feb 15, 2024Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- This repository contains solutions to the practice problems available on the HDLBits platform, which cover a wide range of topics in Digi…☆13Apr 24, 2023Updated 3 years ago
- Course project of Computer Architecture, designed by single-cycle datapath. The verilog code could be completely compiled by Quartus II.☆31Feb 14, 2021Updated 5 years ago
- Tutorial on building your own CPU, in Verilog☆39Apr 25, 2022Updated 4 years ago
- Cortex-M0 DesignStart Wrapper☆24Aug 11, 2019Updated 7 years ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 7 years ago
- This repo contains some object detection algorithms and techniques (Not ML algorithms). This is aimed to get coordinates, width, height, …☆12Nov 26, 2020Updated 5 years ago
- DMA Project using Verilog HDL☆15Dec 26, 2019Updated 6 years ago
- System for detecting vein patterns.☆22Apr 5, 2020Updated 6 years ago
- DEsign 16-bit ALU using Verilog☆10Feb 13, 2016Updated 10 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- VerilogAI – A specialized chatbot for Verilog. Supports code generation, debugging, and explanation with custom prompt engineering and AP…☆18Apr 26, 2026Updated 4 months ago
- The HDL Bits Solutions repository provides answers to the HDL Bits exercises, which are designed for practicing digital hardware design u…☆19Sep 3, 2024Updated 2 years ago
- Wameedh Scientific Club Deep Learning for Computer Vision workshop repository.☆12Apr 2, 2024Updated 2 years ago
- yolov8pose 部署版本，将DFL放在后处理中，部署rk3588.☆11Aug 21, 2024Updated 2 years ago
- FIR band-pass filter using Verilog HDL.☆13Sep 6, 2020Updated 5 years ago
- A simple 8 bit UART implementation in Verilog, with tests and timing diagrams☆42Oct 3, 2025Updated 11 months ago
- High-throughput LDPC decoder on GPU device (see published IEEE article)☆12Jan 25, 2019Updated 7 years ago
- ☆14Jul 4, 2022Updated 4 years ago
- Simple 8-bit UART realization on Verilog HDL.☆120Apr 27, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- HoloCubic 基于esp32-arduino的天气时钟、相册、视频播放、桌面投屏、web服务、bilibili粉丝等☆15Jan 6, 2022Updated 4 years ago
- This repository is made to record the experiences and things learned by the mentees of the Cloudyman Mentorship Program☆36Oct 2, 2021Updated 4 years ago
- A very primitive but hopefully self-educational CPU in Verilog☆155Jan 21, 2015Updated 11 years ago
- Digital Systems Course Project: Fake Currency Detection in Verilog using Basys3 FPGA and MATLAB☆10Sep 30, 2020Updated 5 years ago
- 學習Streamlit☆11Jan 24, 2023Updated 3 years ago
- UART implementation using verilog☆39Feb 14, 2023Updated 3 years ago
- ☆13Mar 7, 2024Updated 2 years ago
- DMA Hardware Description with Verilog☆20Dec 20, 2019Updated 6 years ago
- LLVM Essentials 中文版☆12Feb 18, 2025Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A simple 8-bit computer build in Verilog.☆94Jun 2, 2025Updated last year
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆21Sep 2, 2023Updated 3 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆35Mar 21, 2020Updated 6 years ago
- Conway's Game of Life written in Fortran 77 for FreeDOS☆11Oct 8, 2021Updated 4 years ago
- Design a median filter for a Generic RGB image.☆14Mar 6, 2019Updated 7 years ago
- Use this to create your own stock tracker dashboard☆10Sep 18, 2021Updated 4 years ago
- Implementation of the CMAC keyed hash function using AES as block cipher.☆16Apr 2, 2025Updated last year