Alternatives and similar repositories for MBPlib

Users that are interested in MBPlib are comparing it to the libraries listed below

• ramisheikh / cbp2025
  Championship Branch Prediction 2025
  ☆67Updated 8 months ago
• ucsc-vama / essent
  high-performance RTL simulator
  ☆186Updated last year
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆79Updated last month
• RALC88 / riscv-vectorized-benchmark-suite
  RiVEC Bencmark Suite
  ☆127Updated last year
• UoB-HPC / SimEng
  The University of Bristol HPC Simulation Engine
  ☆104Updated 5 months ago
• sparcians / map
  Modeling Architectural Platform
  ☆216Updated this week
• ppeetteerrs / gem5-RISC-V-FS-Linux
  Repository containing the guide and code for booting RISC-V full system linux using gem5.
  ☆56Updated 4 years ago
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆189Updated this week
• ucb-bar / saturn-vectors
  Chisel RISC-V Vector 1.0 Implementation
  ☆131Updated 4 months ago
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆141Updated last week
• EPFL-LAP / dynamatic
  DHLS (Dynamic High-Level Synthesis) compiler based on MLIR
  ☆161Updated this week
• circt-hls / circt-hls
  CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
  ☆53Updated 2 years ago
• chipsalliance / riscv-vector-tests
  Unit tests generator for RVV 1.0
  ☆100Updated 2 months ago
• agile-hw / lectures
  Lectures for the Agile Hardware Design course in Jupyter Notebooks
  ☆119Updated 2 months ago
• dian-lun-lin / RTLflow
  A GPU acceleration flow for RTL simulation with batch stimulus
  ☆117Updated last year
• pnnl / OpenCGRA
  OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
  ☆166Updated 2 years ago
• CMU-SAFARI / Hermes
  A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical pa…
  ☆76Updated 4 months ago
• snipersim / snipersim
  The Sniper Multi-Core Simulator
  ☆163Updated 3 months ago
• riscv-software-src / riscv-perf-model
  Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model
  ☆206Updated 2 weeks ago
• TeCSAR-UNCC / gem5-SALAM
  ☆109Updated last year
• CMU-SAFARI / DRAM-Bender
  DRAM Bender is the first open source DRAM testing infrastructure that can be used to easily and comprehensively test state-of-the-art HBM…
  ☆109Updated 5 months ago
• pku-liang / ksim
  ☆52Updated last year
• esa-tu-darmstadt / tapasco
  The Task Parallel System Composer (TaPaSCo)
  ☆116Updated last week
• UT-LCA / Scalability-Phase-Simpoint-of-SPEC-CPU2017
  ☆33Updated 5 years ago
• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆59Updated last year
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆162Updated 3 years ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆65Updated last year
• darchr / gem5-skylake-config
  gem5 configuration for intel's skylake micro-architecture
  ☆53Updated 4 years ago
• ChipsandCheese / Microbenchmarks
  Trying to figure various CPU things out
  ☆94Updated 2 weeks ago
• darchr / gem5art
  Artifact, reproducibility, and testing utilites for gem5
  ☆23Updated 4 years ago