andreaskuster / black-parrot-branch-predictor
Branch Predictor Optimization for BlackParrot
☆13Updated 7 months ago
Related projects ⓘ
Alternatives and complementary repositories for black-parrot-branch-predictor
- contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols☆49Updated last month
- SystemC training aimed at TLM.☆26Updated 4 years ago
- RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores☆60Updated this week
- Development of a Network on Chip Simulation using SystemC.☆31Updated 7 years ago
- An example of using Ramulator as memory model in a cycle-accurate SystemC Design☆46Updated 7 years ago
- Project repo for the POSH on-chip network generator☆43Updated last year
- The gem5-X open source framework (based on the gem5 simulator)☆38Updated last year
- Open source RTL simulation acceleration on commodity hardware☆22Updated last year
- HLS for Networks-on-Chip☆31Updated 3 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆47Updated 4 years ago
- Tests for example Rocket Custom Coprocessors☆69Updated 4 years ago
- StateMover is a checkpoint-based debugging framework for FPGAs.☆17Updated 2 years ago
- ☆20Updated last year
- Public release☆46Updated 5 years ago
- Top project for RISC-V Matrix extension proposal and related opensource implementations.☆23Updated 7 months ago
- This is a Clang tool that parses SystemC models, and synthesizes Verilog from it.☆79Updated last month
- ☆67Updated 10 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆39Updated 4 years ago
- Example code for Modern SystemC using Modern C++☆58Updated 2 years ago
- Examples for creating AXI-interfaced peripherals in Chisel☆71Updated 9 years ago
- ☆24Updated 9 months ago
- Algorithmic C Machine Learning Library☆22Updated 3 months ago
- A SystemC productivity library: https://minres.github.io/SystemC-Components/☆94Updated this week
- ☆12Updated this week
- Advanced Architecture Labs with CVA6☆49Updated 10 months ago
- Ratatoskr NoC Simulator☆21Updated 3 years ago
- RISC-V Matrix Specification☆15Updated 2 months ago
- A Style Guide for the Chisel Hardware Construction Language☆106Updated 3 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆113Updated last week
- ☆87Updated 8 months ago