6thimage / FT245_interface
Verilog module to communicate with the FT245 interface of an FTDI FT2232H
☆16Updated 4 years ago
Alternatives and similar repositories for FT245_interface
Users that are interested in FT245_interface are comparing it to the libraries listed below
Sorting:
- 🔴 SystemVerilog FPGA cores to communicate with FTDI Synchronous/Asynchronous FIFOs (FT245 protocol)☆43Updated 3 years ago
- A wishbone controlled scope for FPGA's☆81Updated last year
- Verilog FT245 to AXI stream interface☆28Updated 6 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆32Updated 3 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆60Updated 6 years ago
- USB Serial on the TinyFPGA BX☆136Updated 3 years ago
- Verilog wishbone components☆114Updated last year
- Nitro USB FPGA core☆84Updated last year
- Basic USB 1.1 Host Controller for small FPGAs☆89Updated 4 years ago
- Extensible FPGA control platform☆60Updated 2 years ago
- FPGA USB 1.1 Low-Speed Implementation☆34Updated 6 years ago
- Test of the USB3 IP Core from Daisho on a Xilinx device☆90Updated 5 years ago
- ☆46Updated 3 years ago
- JESD204B core for Migen/MiSoC☆36Updated 4 years ago
- USB Full Speed PHY☆44Updated 5 years ago
- DPLL for phase-locking to 1PPS signal☆32Updated 8 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆86Updated 6 years ago
- assorted library of utility cores for amaranth HDL☆88Updated 7 months ago
- FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.☆54Updated 2 years ago
- Change part number or package in a Xilinx 7-series FPGA bitstream☆38Updated 5 years ago
- ☆41Updated 5 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 5 years ago
- experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.☆22Updated last year
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆94Updated 4 years ago
- USB Full-Speed/Hi-Speed Device Controller core for FPGA☆32Updated 4 years ago
- ☆20Updated 2 years ago
- FuseSoC standard core library☆136Updated last month
- ☆110Updated 2 years ago
- Small footprint and configurable JESD204B core☆42Updated 3 weeks ago
- My VHDL code☆9Updated 6 years ago