Library of generic verilog buildingblocks
☆17Dec 25, 2025Updated 9 months ago
Alternatives and similar repositories for verilog-buildingblocks
Users that are interested in verilog-buildingblocks are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆20Jun 18, 2022Updated 4 years ago
- Example Verilog code for Ulx3s☆45May 5, 2022Updated 4 years ago
- Minimal RISC-V RV32I CPU design as described in a companion blog post.☆13Jun 14, 2020Updated 6 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆35Jun 5, 2021Updated 5 years ago
- FPGA config visualized. demo:☆20Mar 17, 2020Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga☆27Aug 23, 2019Updated 7 years ago
- Verilog Examples and WebFPGA Standard Library☆11Nov 25, 2019Updated 6 years ago
- Circuit Synthesis for Yao's Garbled Circuit by TinyGarble☆12Sep 25, 2020Updated 6 years ago
- Implementation of SHA256 Hasher with UART Transceiver in Verilog. Designed to run on Altera's DE2 FPGA Development Board.☆16Oct 16, 2018Updated 8 years ago
- Industry standard I/O for nMigen☆12Apr 23, 2020Updated 6 years ago
- ice40 UltraPlus demos☆23Oct 12, 2020Updated 6 years ago
- ☆14Nov 14, 2022Updated 3 years ago
- Icestudio collection for standard Input-Output in different devices☆15Jun 28, 2024Updated 2 years ago
- QQSPI Pmod-compatible 32MB PSRAM module☆16Sep 14, 2023Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Modular Exponentiation core written i Verilog. Supports key lengths between 32 and 8192 bits.☆17Oct 8, 2020Updated 6 years ago
- Verilog FPGA code : including experimental DSP audio processor☆14Dec 1, 2020Updated 5 years ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- Demonstration of the YoWASP toolchain being used with Visual Studio Code to program a Radiona ULX3S board☆11Jan 1, 2024Updated 2 years ago
- Some simple demo routines for the TinyFPGA BX☆16Sep 5, 2018Updated 8 years ago
- Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. …☆15Jan 19, 2018Updated 8 years ago
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago
- ☆13Nov 29, 2025Updated 10 months ago
- ☆34Mar 12, 2021Updated 5 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Riegel Computer☆17Jun 30, 2023Updated 3 years ago
- FPGA implementation of the AnotherWorld CPU (equivalent to the original VM)☆17Apr 6, 2020Updated 6 years ago
- Sean Barrett Quake 1 map viewer updated to use SDL☆15Dec 2, 2025Updated 10 months ago
- hdmi-ts Project☆13Jun 11, 2017Updated 9 years ago
- 适用于FPGA——利用串口通信接收幅度频率信息数据帧，控制DA输出相应正弦信号☆10Jul 10, 2019Updated 7 years ago
- mirror of https://git.elphel.com/Elphel/eddr3☆42Oct 16, 2017Updated 8 years ago
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆15Jul 23, 2020Updated 6 years ago
- A simple tool to visualize and generate gcode for variable width single layer toolpaths☆11Jul 6, 2020Updated 6 years ago
- PLEASE MOVE TO PAWSv2☆16Feb 2, 2022Updated 4 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- FAST-9 Accelerator for Corner Detection☆38Jan 1, 2021Updated 5 years ago
- Miscellaneous ULX3S examples (advanced)☆88Feb 7, 2026Updated 8 months ago
- Utilities for the ECP5 FPGA☆17Aug 5, 2021Updated 5 years ago
- Zedboard projects☆11May 15, 2016Updated 10 years ago
- DSP by FPGA☆15Sep 12, 2023Updated 3 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆37Jul 2, 2023Updated 3 years ago
- Unofficial nextpnr WebAssembly packages☆17Mar 11, 2026Updated 7 months ago