muneeb-mbytes / apb_avipLinks
ABP Accelerated VIP
☆22Updated 3 years ago
Alternatives and similar repositories for apb_avip
Users that are interested in apb_avip are comparing it to the libraries listed below
Sorting:
- SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.☆12Updated 4 years ago
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆17Updated 2 years ago
- this repository is a project about iic master, created by gyj in second half of 2017☆18Updated 7 years ago
- OpenExSys_NoC a mesh-based network on chip IP.☆20Updated 2 years ago
- ☆28Updated 7 months ago
- this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.☆19Updated 11 years ago
- AXI4 with a FIFO integrated with VIP☆22Updated last year
- ☆20Updated 3 years ago
- Utilities for Avalon Memory Map☆11Updated last year
- Verilog Implementation of the Number Theoretic Transform (NTT) and its inverse operation (INTT) utilizing modulo arithmetic for lattice-b…☆15Updated 2 months ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Updated last year
- ☆13Updated 6 years ago
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆24Updated 7 years ago
- AHB Bus lite v3.0☆17Updated 6 years ago
- Verification AXI-4 bus standard using UVM and System Verilog☆15Updated 7 years ago
- Simple demo showing how to use the ping pong FIFO☆16Updated 9 years ago
- ☆27Updated 4 years ago
- Synchronous FIFO design & verification using systemVerilog Assertions☆17Updated 4 years ago
- verification of simple axi-based cache☆18Updated 6 years ago
- Generate UVM testbench framework template files with Python 3☆27Updated 6 years ago
- Generic AXI master stub☆19Updated 11 years ago
- ☆22Updated 5 years ago
- ☆23Updated 6 years ago
- Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.☆13Updated last year
- Various low power labs using sky130☆13Updated 4 years ago
- UVM Clock and Reset Agent☆14Updated 8 years ago
- Verification of DMA Controller for 8086 Microprocessor Systems using OO Test bench☆16Updated 5 years ago
- APB Logic☆23Updated 2 weeks ago
- General Purpose I/O agent written in UVM☆18Updated 8 years ago
- This repository contains an example of the connection between an UVM Testbench and a Python reference model using UVM Connect from Mentor…☆17Updated 5 years ago