Alternatives and similar repositories for usb_dfu

Users that are interested in usb_dfu are comparing it to the libraries listed below

• tomverbeure / jtag_uart_example
  Mini CPU design with JTAG UART support
  ☆20Updated 4 years ago
• Wren6991 / TwoWireDebug
  Yet Another Debug Transport
  ☆22Updated 3 years ago
• enjoy-digital / litex_rp2040_pmod_test
  Test of a RP2040 PMOD attached to a LiteX SoC.
  ☆25Updated 2 years ago
• dan-rodrigues / pico-hx
  PCB combining Raspberry Pi Pico and iCE40 FPGA
  ☆32Updated last year
• tongchen126 / fpga_pcie_ethernet
  ☆16Updated 3 years ago
• machdyne / lowe
  Löwe FPGA Board
  ☆12Updated last year
• fallen / SucreLA
  Open source Logic Analyzer based on LiteX SoC
  ☆26Updated 3 months ago
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆30Updated 3 years ago
• xobs / lxbuildenv
  Simplified environment for litex
  ☆14Updated 4 years ago
• mkvenkit / humble_ice
  A low cost FPGA development board based on Lattice iCE40UP5k and Raspberry Pi RP2040.
  ☆45Updated 2 years ago
• tomverbeure / intel_jtag_primitive_blog
  How to use the Intel JTAG primitive without using virtual JTAG
  ☆17Updated 3 years ago
• 360nosc0pe / scope
  Siglent SDS1x0xX-E FPGA bitstreams
  ☆41Updated 6 months ago
• greatscottgadgets / luna-soc
  Amaranth HDL libary for building USB-capable SoC designs.
  ☆22Updated last month
• lawrie / ulx3s_bit_streams
  Bit streams forthe Ulx3s ECP5 device
  ☆17Updated 2 years ago
• openXC7 / openXC7-snap
  snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support
  ☆29Updated last year
• BLangOS / VexRiscV_with_HW-GDB_Server
  VexRiscV system with GDB-Server in Hardware
  ☆21Updated 2 years ago
• hansfbaier / colorlight-qmtech-adapter
  Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor
  ☆19Updated 2 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆60Updated last week
• micro-FPGA / CRUVI
  CRUVI Standard Specifications
  ☆19Updated last year
• ECP5-PCIe / ECP5-Utils
  Utilities for the ECP5 FPGA
  ☆18Updated 3 years ago
• hydrausb3 / wch-ch569-serdes
  WCH CH569 SerDes Reverse Engineering
  ☆26Updated 2 years ago
• lambdaconcept / amaranth-to-litex
  Use amaranth-to-litex to simply import Amaranth code into a Litex project.
  ☆15Updated last year
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆31Updated 3 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆31Updated 5 years ago
• Wren6991 / OpenDAP
  ☆23Updated 2 years ago
• no2fpga / no2muacm
  Drop In USB CDC ACM core for iCE40 FPGA
  ☆34Updated 3 years ago
• jevinskie / liteluna
  LiteX LUNA USB stack integration
  ☆14Updated 3 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 3 years ago
• YosysHQ / prjpeppercorn
  Project Peppercorn - GateMate FPGA Bitstream Documentation
  ☆23Updated this week
• ultraembedded / ecpix-5
  Projects for the ECPiX-5 - a ECP5 FPGA board.
  ☆14Updated 5 years ago