parallella / parallella-fpga

Related projects ⓘ

Alternatives and complementary repositories for parallella-fpga

• ZipCPU / s6soc
  CMod-S6 SoC
  ☆36Updated 6 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆40Updated last month
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆60Updated 3 weeks ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆54Updated last month
• SpinalHDL / VexRiscvSoftcoreContest2018
  ☆63Updated 5 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆36Updated 3 years ago
• rprinz08 / arty-s7-multinic
  ArtyS7-50 VexRiscV LiteX SoC using multiple Ethernet Interface
  ☆13Updated 3 years ago
• Elphel / x393
  mirror of https://git.elphel.com/Elphel/x393
  ☆37Updated last year
• jsloan256 / titan
  Altium PCB project for the Titan PCI Express development card. This card uses the Lattice ECP5 FPGA.
  ☆19Updated 9 years ago
• terpstra / opa
  Open Processor Architecture
  ☆26Updated 8 years ago
• f4pga / prjtrellis
  Documenting the Lattice ECP5 bit-stream format.
  ☆51Updated last year
• TUT-ASI / leon3-grlib-gpl-mirror
  Automated Git mirror of Gaisler's GRLIB/Leon3 releases
  ☆15Updated 4 months ago
• whitequark / icefloorplan
  iCE40 floorplan viewer
  ☆24Updated 6 years ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆35Updated 5 years ago
• m-labs / lm32
  LatticeMico32 soft processor
  ☆102Updated 10 years ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆29Updated last year
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆31Updated 2 years ago
• FPGA-Research-Manchester / byteman
  Bitstream relocation and manipulation tool.
  ☆40Updated last year
• Galland / LEON2
  LEON2 SPARC CPU IP core LGPL by Gaisler Research
  ☆18Updated 11 years ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆40Updated 7 months ago
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆63Updated 2 years ago
• TUM-LIS / glip
  Generic Logic Interfacing Project
  ☆44Updated 4 years ago
• DaveBerkeley / serv_soc
  SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.
  ☆29Updated 4 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆20Updated 5 years ago
• olofk / observer
  ☆40Updated 4 years ago
• gtjennings1 / UPDuino-LH154Q01-Display
  Design to connect Lattice Ultraplus FPGA to LH154Q01 Display
  ☆28Updated 6 years ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆58Updated 5 years ago