FPGA Development for the parallella
☆19Aug 9, 2017Updated 9 years ago
Alternatives and similar repositories for parallella-fpga
Users that are interested in parallella-fpga are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Linux Kernel forked from ADI (with latest ADI HDMI drivers)☆69Sep 15, 2019Updated 6 years ago
- snickerdoodle Linux☆18Sep 10, 2018Updated 7 years ago
- Vivado design for basic NeTV2 FPGA with chroma-based overlay☆20Dec 24, 2016Updated 9 years ago
- A Simple to use build environment for parallella using yocto☆13Jul 28, 2025Updated last year
- MIPI DSI transmitter core for Xilinx FPGAs (work in progress)☆89Apr 25, 2017Updated 9 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Sample minimal Vivado project for Parallella FPGA☆46May 15, 2016Updated 10 years ago
- Icestorm, Arachne-pnr and Yosys pre-built binaries: GNU/Linux(+ARM), Windows and Mac OS☆40May 9, 2022Updated 4 years ago
- 360nosc0pe Yocto build environment☆13Aug 27, 2018Updated 8 years ago
- Cobo Vault developer Documents☆13Mar 17, 2021Updated 5 years ago
- gateware for the main fpga, including a hispi decoder and image processing☆13Sep 27, 2018Updated 7 years ago
- Port of SameBoy, a highly accurate GB and GBC emulator to the Teensy4.1 microcontroller.☆14Jun 23, 2022Updated 4 years ago
- BSODomizer HD: HDL for Cyclone V GX Starter Kit☆15Aug 5, 2016Updated 10 years ago
- Traces for SVA - SystemVerilog Assertions; Will use Go2UVM package to write traces and use uvm_report_mock to predict errors☆12Sep 2, 2016Updated 10 years ago
- Tcl examples repository designed primarily for use with the latest version of the Libero® SoC Design Suite.☆11Jul 18, 2024Updated 2 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- START HERE! FPGA and Linux Development Combined☆24Jan 29, 2017Updated 9 years ago
- An online Verilog IDE based on YosysJS.☆25Jan 7, 2016Updated 10 years ago
- A Prototype Debugging Tool for MIT Scheme☆32Aug 6, 2019Updated 7 years ago
- ☆12May 5, 2015Updated 11 years ago
- ☆15Dec 1, 2022Updated 3 years ago
- XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA☆22Mar 7, 2024Updated 2 years ago
- The robot base on ZedBoard☆16Jul 3, 2014Updated 12 years ago
- CANoolder: CAN to 3.3V logic level interface. Dumb. Cheap. Simple. Pick 3.☆15Feb 14, 2018Updated 8 years ago
- photonSDI - an open source SDI core☆11May 26, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆12May 3, 2017Updated 9 years ago
- Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development