tactcomplabs / rev
RISC-V SST CPU Component
☆21Updated 3 weeks ago
Alternatives and similar repositories for rev:
Users that are interested in rev are comparing it to the libraries listed below
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆62Updated last year
- An example of using Ramulator as memory model in a cycle-accurate SystemC Design☆48Updated 7 years ago
- CGRA framework with vectorization support.☆25Updated this week
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆38Updated 6 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…☆20Updated 8 months ago
- ☆22Updated 3 months ago
- The gem5-X open source framework (based on the gem5 simulator)☆38Updated last year
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆48Updated last year
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆60Updated this week
- ☆20Updated last year
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆52Updated 5 years ago
- Ratatoskr NoC Simulator☆24Updated 3 years ago
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆41Updated 7 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆68Updated 5 years ago
- A hardware synthesis framework with multi-level paradigm☆36Updated last month
- ☆91Updated last year
- STONNE Simulator integrated into SST Simulator☆17Updated 10 months ago
- Public release☆49Updated 5 years ago
- The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…☆33Updated last month
- MAPLE's hardware-software co-design allows programs to perform long-latency memory accesses asynchronously from the core, avoiding pipeli…☆21Updated last year