Alternatives and similar repositories for vdf-fpga

Users that are interested in vdf-fpga are comparing it to the libraries listed below

• ZcashFoundation / zcash-fpga
  Zcash FPGA acceleration engine
  ☆128Updated 5 years ago
• supranational / hardware
  Low level arithmetic primitives in RTL
  ☆23Updated 5 years ago
• scarv / xcrypto
  XCrypto: a cryptographic ISE for RISC-V
  ☆92Updated 2 years ago
• mih0 / FPGA_Mining_AWS
  Example verilog / miner for crypto mining using AWS F1 instances
  ☆30Updated 7 years ago
• bsdevlin / fpga_snark_prover
  An acceleration engine for proving SNARKS over the bn128 curve, targeted for AWS FPGAs
  ☆58Updated 5 years ago
• datenlord / TRIDENT
  A Hardware Implemented Poseidon Hasher
  ☆18Updated 3 years ago
• ascend-secure-processor / oram
  Hardware implementation of ORAM
  ☆22Updated 8 years ago
• ljhsiun2 / EllipticCurves_SystemVerilog
  Elgamal's over Elliptic Curves
  ☆19Updated 6 years ago
• unixb0y / SystemVerilogSHA256
  SHA256 in (System-) Verilog / Open Source FPGA Miner
  ☆81Updated 7 years ago
• stremovsky / moneroasic
  Cryptonight Monero Verilog code for ASIC
  ☆20Updated 7 years ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆36Updated 4 years ago
• secworks / sha3
  FIPS 202 compliant SHA-3 core in Verilog
  ☆22Updated 5 years ago
• cornell-brg / lizard
  Cornell CSL's Modular RISC-V RV64IM Out-of-Order Processor Built with PyMTL
  ☆88Updated 6 years ago
• secworks / cmac
  Implementation of the CMAC keyed hash function using AES as block cipher.
  ☆16Updated 6 months ago
• stnolting / fpga_puf
  Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
  ☆134Updated 2 years ago
• Xilinx / Vitis-AWS-F1-Developer-Labs
  ☆46Updated 5 years ago
• secworks / sha256
  Hardware implementation of the SHA-256 cryptographic hash function
  ☆358Updated 2 months ago
• aionnetwork / aion_epic_fpgaminer
  FPGA referrence implementation for aion equihash 2109
  ☆15Updated 7 years ago
• eriksargent / PUF-lab
  FPGA implementation of a physical unclonable function for authentication
  ☆33Updated 8 years ago
• aeonstasis / sssp-fpga
  Single-source shortest paths accelerated with AWS F1 FPGA
  ☆14Updated 7 years ago
• Goshik92 / SHA256Hasher
  SHA-256 IP core for ZedBoard (Zynq SoC)
  ☆30Updated 7 years ago
• fusesoc / fusesoc-generators
  A collection of core generators to use with FuseSoC
  ☆16Updated last year
• teknohog / Xilinx-Serial-Miner
  Bitcoin miner for Xilinx FPGAs
  ☆97Updated 12 years ago
• johan92 / fpga-hash-table
  Simple hash table on Verilog (SystemVerilog)
  ☆50Updated 9 years ago
• sjohann81 / hf-risc
  HF-RISC SoC
  ☆39Updated 3 weeks ago
• firesim / firechip
  Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator …
  ☆57Updated 5 years ago
• westerndigitalcorporation / swerv_eh1_fpga
  FPGA reference design for the the Swerv EH1 Core
  ☆72Updated 5 years ago
• fpgasystems / caribou
  Caribou: Distributed Smart Storage built with FPGAs
  ☆67Updated 7 years ago
• pulp-platform / bigpulp
  ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform
  ☆50Updated 3 years ago
• antonson-j1 / SHA256-Accelerator-Hardware
  This project aims at implementing an hardware accelerator peripheral for SHA256 hashing algorithm with AXI4 interfacing with PicoRV32 CPU…
  ☆26Updated 3 years ago