shaowei-cai-group / ParKissat-RSLinks
Parallel SAT solver that won the SAT Competition 2022 by a large margin (24% faster than the 2nd ranked solver)
☆25Updated 3 years ago
Alternatives and similar repositories for ParKissat-RS
Users that are interested in ParKissat-RS are comparing it to the libraries listed below
Sorting:
- A Simple CDCL Solver☆35Updated 2 years ago
- An advanced circuit-based sat solver☆36Updated 9 months ago
- ☆14Updated 7 years ago
- A framework to ease parallelization of sequential SAT solvers☆26Updated 7 months ago
- Random Generator of Btor2 Files☆10Updated 2 years ago
- SATZilla SAT feature extraction tool☆11Updated last year
- A high-efficiency hybrid solving CEC algorithm☆14Updated 2 years ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆40Updated last year
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Updated last year
- A generic parser and tool package for the BTOR2 format.☆45Updated 2 months ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆26Updated 3 years ago
- AIGER And-Inverter-Graph Library☆94Updated 4 months ago
- A fork of the Kissat SAT solver with additional features. Supports incremental solving.☆17Updated 3 years ago
- C++ implementation of FRAIGs. Won the 1st place in 2018 Cadence-sponsored contest in NTU DSnP.☆10Updated 5 years ago
- rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission☆11Updated 5 months ago
- A Parallel SAT Solver with GPU Accelerated Inprocessing☆137Updated last week
- Distributed and ressource elastic cube-and-conquer SAT & QBF solver☆20Updated 2 years ago
- ☆12Updated 2 years ago
- A Python/C++ implementation of Quine McCluskey(Tabulation) method.☆12Updated 7 years ago
- SMTSampler: Efficient Stimulus Generation from Complex SMT Constraints☆31Updated 6 years ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆22Updated 8 months ago
- py-aiger: A python library for manipulating sequential and combinatorial circuits encoded using `and` & `inverter` gates (AIGs).☆49Updated 11 months ago
- ☆35Updated 4 months ago
- ☆15Updated 2 years ago
- ☆18Updated 4 years ago
- PyTorch implementation of NeuroSAT☆28Updated 2 years ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆21Updated 6 months ago
- ☆26Updated this week
- Cube-and-Conquer SAT solver☆41Updated 4 months ago
- Python version of tools to work with AIG formatted files☆12Updated 6 months ago