Alternatives and similar repositories for painless

Users that are interested in painless are comparing it to the libraries listed below

• muhos / ParaFROST
  A Parallel SAT Solver with GPU Accelerated Inprocessing
  ☆134Updated last week
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆26Updated last year
• CoriolisSP / FuzzBtor2
  Random Generator of Btor2 Files
  ☆10Updated 2 years ago
• fangwenji / tacas23-wasim
  ☆12Updated 2 years ago
• arminbiere / gimsatul
  ☆35Updated 3 months ago
• gipsyh / rIC3-HWMCC24
  rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission
  ☆11Updated 4 months ago
• d-kfmnn / amulet2
  AMulet 2. - A better AIG Multiplier Examination Tool
  ☆26Updated 3 years ago
• jetafese / btor2mlir
  Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification
  ☆20Updated 2 months ago
• UCSBarchlab / owl
  Control Logic Synthesis: Drawing the Rest of the OWL
  ☆13Updated last year
• Gy-Hu / E-Syn
  E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)
  ☆38Updated last year
• arminbiere / aiger
  AIGER And-Inverter-Graph Library
  ☆92Updated 3 months ago
• mvcisback / py-aiger
  py-aiger: A python library for manipulating sequential and combinatorial circuits encoded using `and` & `inverter` gates (AIGs).
  ☆49Updated 11 months ago
• shaowei-cai-group / X-SAT
  An advanced circuit-based sat solver
  ☆35Updated 8 months ago
• cristian-mattarei / CoSA
  CoreIR Symbolic Analyzer
  ☆74Updated 5 years ago
• shaowei-cai-group / ParKissat-RS
  Parallel SAT solver that won the SAT Competition 2022 by a large margin (24% faster than the 2nd ranked solver)
  ☆25Updated 2 years ago
• Gy-Hu / HWMCC24-benchmark
  Collection for submission (Hardware Model Checking Benchmark)
  ☆11Updated last week
• jix / kissat_extras
  A fork of the Kissat SAT solver with additional features. Supports incremental solving.
  ☆17Updated 3 years ago
• hwmcc / btor2tools
  A generic parser and tool package for the BTOR2 format.
  ☆43Updated 2 months ago
• iscas-tis / CHA
  ☆19Updated last year
• stanford-centaur / pono
  Pono: A flexible and extensible SMT-based model checker
  ☆116Updated this week
• HybridCEC / Hybrid-CEC
  A high-efficiency hybrid solving CEC algorithm
  ☆14Updated 2 years ago
• aman-goel / avr
  Reads a state transition system and performs property checking
  ☆88Updated 2 months ago
• gussmith23 / lakeroad
  FPGA synthesis tool powered by program synthesis
  ☆52Updated last month
• mgudemann / iimc
  ☆14Updated 7 years ago
• JKomp / AIGER
  Python version of tools to work with AIG formatted files
  ☆12Updated 6 months ago
• amahzoon / genmul
  ☆18Updated 4 years ago
• temelmertcan / multgen
  Integer Multiplier Generator for Verilog
  ☆23Updated 4 months ago
• SPbSAT / cirbo
  ☆24Updated last month
• gipsyh / rIC3
  Hardware Formal Verification Tool
  ☆74Updated this week
• apl-cornell / PDL
  A Hardware Pipeline Description Language
  ☆49Updated 4 months ago