z11i / pysatLinks
Simple SAT solver with CDCL implemented in Python
☆18Updated 2 years ago
Alternatives and similar repositories for pysat
Users that are interested in pysat are comparing it to the libraries listed below
Sorting:
- PyTorch implementation of NeuroSAT☆28Updated 2 years ago
- ☆16Updated 2 years ago
- C++ implementation of FRAIGs. Won the 1st place in 2018 Cadence-sponsored contest in NTU DSnP.☆10Updated 5 years ago
- A high-efficiency hybrid solving CEC algorithm☆14Updated 2 years ago
- Logic Synthesis System from UC Berkeley (Unofficial Distribution)☆15Updated 6 years ago
- Parallel SAT solver that won the SAT Competition 2022 by a large margin (24% faster than the 2nd ranked solver)☆25Updated 2 years ago
- LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models☆25Updated 3 years ago
- A Simple CDCL Solver☆35Updated 2 years ago
- ☆14Updated 7 years ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆22Updated 7 months ago
- Python version of tools to work with AIG formatted files☆12Updated 6 months ago
- ☆13Updated 2 years ago
- QuteRTL: A RTL Front-End Towards Intelligent Synthesis and Verification☆16Updated 9 years ago
- ☆18Updated 4 years ago
- py-aiger: A python library for manipulating sequential and combinatorial circuits encoded using `and` & `inverter` gates (AIGs).☆49Updated 11 months ago
- ☆13Updated 4 years ago
- ☆10Updated 4 years ago
- Semi-Tenser Product based SAT and AllSAT solver, where it can solve CNF and circuit input.☆17Updated 2 years ago
- This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".☆24Updated 2 years ago
- Random Generator of Btor2 Files☆10Updated 2 years ago
- A Formal Verification Framework for Chisel☆18Updated last year
- NeuroCore: Guiding CDCL with Unsat-Core Predictions☆46Updated 5 years ago
- Awesome machine learning for logic synthesis☆29Updated 3 years ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆26Updated 3 years ago
- NLocalSAT; Boosting Local Search with Solution Prediction☆18Updated 2 years ago
- DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)☆115Updated 2 years ago
- SATZilla SAT feature extraction tool☆11Updated last year
- Integer Multiplier Generator for Verilog☆23Updated 4 months ago
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆20Updated 10 months ago
- A generic parser and tool package for the BTOR2 format.☆43Updated 2 months ago