secworks / blake2Links
Hardware implementation of the blake2 hash function
☆25Updated 5 years ago
Alternatives and similar repositories for blake2
Users that are interested in blake2 are comparing it to the libraries listed below
Sorting:
- An open source FPGA miner for Blakecoin☆52Updated 11 years ago
- Software, tools, documentation for Vegaboard platform☆64Updated 6 years ago
- A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open d…☆176Updated 3 years ago
- IP submodules, formatted for easier CI integration☆30Updated 3 months ago
- XCrypto: a cryptographic ISE for RISC-V☆92Updated 3 years ago
- Untethered (stand-alone) FPGA implementation of the lowRISC SoC☆55Updated 6 years ago
- a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially☆41Updated 9 years ago
- FPGA referrence implementation for aion equihash 2109☆15Updated 7 years ago
- Bitcoin miner for Xilinx FPGAs☆99Updated 12 years ago
- VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin☆63Updated 7 years ago
- [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4☆37Updated 4 years ago
- DUAL Spartan6 Development Platform☆85Updated 7 years ago
- A VHDL implementation of SipHash☆13Updated 10 years ago
- A version of the HDMI2USB firmware based around LiteX tools produced by @Enjoy-Digital (based on misoc+migen created by @M-Labs)☆148Updated 5 years ago
- Implementation of an RSA VDF evaluator targeting FPGAs.☆49Updated 6 years ago
- VexRiscv-SMP integration test with LiteX.☆26Updated 5 years ago
- YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…☆45Updated last year
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Updated 10 years ago
- A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.☆37Updated 3 years ago
- mirror of https://git.elphel.com/Elphel/x393☆40Updated 2 years ago
- Reverse-engineering tools for FPGA bitstreams, Altera and Xilinx☆89Updated 10 years ago
- Betrusted main SoC design☆151Updated 5 months ago
- SuperSpeed USB 3.0 FPGA platform☆264Updated 10 years ago
- LatticeMico32 soft processor☆107Updated 11 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆45Updated 3 years ago
- Verilog implementation of the 32-bit version of the Blake2 hash function☆21Updated 3 weeks ago
- ☆63Updated 7 years ago
- Example verilog / miner for crypto mining using AWS F1 instances☆30Updated 7 years ago
- Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah…☆41Updated last year
- Mining CryptoNight Haven on the Varium C1100☆10Updated 3 years ago