Alternatives and similar repositories for blake2

Users that are interested in blake2 are comparing it to the libraries listed below

• kramble / FPGA-Blakecoin-Miner
  An open source FPGA miner for Blakecoin
  ☆52Updated 11 years ago
• pemb / siphash
  A VHDL implementation of SipHash
  ☆13Updated 10 years ago
• scarv / xcrypto
  XCrypto: a cryptographic ISE for RISC-V
  ☆93Updated 2 years ago
• fpgaminer / Open-Source-FPGA-Bitcoin-Miner
  A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open d…
  ☆176Updated 3 years ago
• open-isa-org / open-isa.org
  Software, tools, documentation for Vegaboard platform
  ☆65Updated 5 years ago
• betrusted-io / gateware
  IP submodules, formatted for easier CI integration
  ☆30Updated 2 months ago
• lowRISC / lowrisc-fpga
  Untethered (stand-alone) FPGA implementation of the lowRISC SoC
  ☆56Updated 5 years ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆37Updated 4 years ago
• aionnetwork / aion_epic_fpgaminer
  FPGA referrence implementation for aion equihash 2109
  ☆15Updated 7 years ago
• timvideos / HDMI2USB-litex-firmware
  A version of the HDMI2USB firmware based around LiteX tools produced by @Enjoy-Digital (based on misoc+migen created by @M-Labs)
  ☆149Updated 5 years ago
• bunnie / netv2-fpga-basic-overlay
  Vivado design for basic NeTV2 FPGA with chroma-based overlay
  ☆20Updated 8 years ago
• Elphel / x393
  mirror of https://git.elphel.com/Elphel/x393
  ☆40Updated 2 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆41Updated 9 years ago
• secworks / blake2s
  Verilog implementation of the 32-bit version of the Blake2 hash function
  ☆21Updated 5 months ago
• tommythorn / yari
  YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…
  ☆46Updated 9 months ago
• betrusted-io / betrusted-soc
  Betrusted main SoC design
  ☆145Updated 2 months ago
• parallella / parallella-fpga
  FPGA Development for the parallella
  ☆19Updated 8 years ago
• pedrorivera / SiaFpgaMiner
  VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin
  ☆62Updated 7 years ago
• apertus-open-source-cinema / alpha-software
  Axiom Alpha prototype software (FPGA, Linux, etc.)
  ☆30Updated 9 years ago
• secworks / chacha
  Verilog 2001 implementation of the ChaCha stream cipher.
  ☆42Updated 5 months ago
• pliu6 / vhd2vl
  vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.
  ☆26Updated 9 years ago
• m-labs / milkymist
  SoC design for Milkymist One - LM32, DDR SDRAM, 2D TMU, PFPU
  ☆153Updated 11 years ago
• cseed / cynth
  a simple C-to-Verilog compiler
  ☆51Updated 8 years ago
• supranational / vdf-fpga
  Implementation of an RSA VDF evaluator targeting FPGAs.
  ☆48Updated 5 years ago
• greatscottgadgets / daisho
  SuperSpeed USB 3.0 FPGA platform
  ☆262Updated 10 years ago
• ZipCPU / zipversa
  A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure
  ☆16Updated 5 years ago
• blackmesalabs / MesaBusProtocol
  Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
  ☆36Updated 9 months ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆99Updated 5 years ago
• djn3m0 / debit
  Reverse-engineering tools for FPGA bitstreams, Altera and Xilinx
  ☆86Updated 10 years ago
• ZipCPU / zbasic
  A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
  ☆43Updated 2 years ago