a simple C-to-Verilog compiler
☆51Apr 16, 2017Updated 8 years ago
Alternatives and similar repositories for cynth
Users that are interested in cynth are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Experiments for iCEstick evaluation board with iCE40HX-1k FPGA - using open source toolchain☆13Nov 24, 2015Updated 10 years ago
- Lattice iCE40 FPGA experiments - Work in progress☆106Jun 30, 2021Updated 4 years ago
- A collection of big designs to run post-synthesis simulations with yosys☆51Oct 27, 2015Updated 10 years ago
- Open source hardware down to the chip level!☆30Sep 24, 2021Updated 4 years ago
- Tutorial for integrating PyMTL and Vivado HLS☆19Apr 17, 2016Updated 9 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Simplified design of an analog keypad matrix interface and demo thereof☆16May 27, 2021Updated 4 years ago
- An LLVM based mini-C to Verilog High-level Synthesis tool☆40Mar 7, 2025Updated last year
- ☆11Dec 18, 2017Updated 8 years ago
- symbolic execution engine for brainfuck because lol☆14Feb 5, 2017Updated 9 years ago
- The Mini Wheelbot is a balancing, reaction wheel unicycle robot designed as a testbed for learning-based control. It is an unstable syste…☆33Mar 4, 2026Updated 3 weeks ago
- A circuit toolkit☆107Feb 23, 2020Updated 6 years ago
- The Shang high-level synthesis framework☆120May 29, 2014Updated 11 years ago
- Verilog for the Bus Pirate Ultra FPGA☆26Dec 12, 2019Updated 6 years ago
- Docker image for running Vivado in a 64-bit Debian Jessie container☆13Mar 17, 2018Updated 8 years ago
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A picorv32 RISC-V processor with some very simple memory and peripherals. For Terasic DE-0 Nano☆13Apr 15, 2019Updated 6 years ago
- Docker Development Environment for SpinalHDL☆20Aug 8, 2024Updated last year
- The excellent Diolan bootloader modified to use standard (non-extended) instruction set and still fit in 1 kB bootblock☆10Oct 6, 2023Updated 2 years ago
- Library of additional parts for KiCad for use with Sakura-IT projects☆24Dec 1, 2023Updated 2 years ago
- a stm32f10x bsp demo, containing some drivers☆16Feb 11, 2014Updated 12 years ago
- Altera MAX V bitstream documentation -- CLEANUP PENDING☆17May 23, 2020Updated 5 years ago
- Object-Oriented Programming☆12Aug 26, 2021Updated 4 years ago
- Synthesiser for Asynchronous Verilog Language☆20Oct 29, 2014Updated 11 years ago
- An attempt at a small Verilog implementation of the original Apple 1 on an FPGA☆149Sep 22, 2025Updated 6 months ago
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Sample minimal Vivado project for Parallella FPGA☆45May 15, 2016Updated 9 years ago
- JOP is a Java processor for real-time systems☆130May 28, 2014Updated 11 years ago
- FPGA Design Suite based on C to Verilog design flow.☆247Apr 5, 2019Updated 6 years ago
- Regression test suite for Icarus Verilog. (OBSOLETE)☆115Mar 2, 2023Updated 3 years ago
- Evoker is a graphical tool for plotting genotype intensity data in order to assess quality of genotype calls. It implements a compact, bi…☆13Dec 21, 2017Updated 8 years ago
- bits and bobs for hacking on certain variants of the TM155 mouse (mainly TeckNet M009-V2)☆13Jan 18, 2019Updated 7 years ago
- A suite of tools for pretty printing, diffing, and exploring abstract syntax trees.☆15Mar 3, 2026Updated 3 weeks ago
- Tutorial/starter code for setting up GCC for PSOC5 (ARM) in an open-source baremetal configuration.☆33Nov 3, 2014Updated 11 years ago
- ZyncMV is an open source machine/computer vision platform using the Xilinx Zync FPGA+ ARM Cortex A9 SoC☆20Feb 12, 2017Updated 9 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- "My 5-Year IoT Mission" presentation at Hackware 3 Dec 2019☆10Dec 3, 2019Updated 6 years ago
- ILAng documentation☆10Nov 2, 2025Updated 4 months ago
- small board to convert linear 3 pin regulator to switching regulator (TO220 compatible, eg 7805)☆11Oct 8, 2015Updated 10 years ago
- Reverse-engineering tools for FPGA bitstreams, Altera and Xilinx☆89Jun 10, 2015Updated 10 years ago
- ☆54Apr 25, 2017Updated 8 years ago
- ☆15Sep 24, 2024Updated last year
- Makefiles for using EFM8 microcontrollers with SDCC☆11Apr 30, 2018Updated 7 years ago