apertus-open-source-cinema / alpha-softwareLinks
Axiom Alpha prototype software (FPGA, Linux, etc.)
☆30Updated 9 years ago
Alternatives and similar repositories for alpha-software
Users that are interested in alpha-software are comparing it to the libraries listed below
Sorting:
- Axiom Alpha prototype hardware source files (electronic schematics, documentation, PCB layouts, etc.)☆23Updated 11 years ago
- Freecores website☆19Updated 8 years ago
- YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…☆45Updated 7 months ago
- USB 1.1 Device IP Core☆21Updated 7 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆51Updated last year
- SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research☆38Updated 10 months ago
- mirror of https://git.elphel.com/Elphel/x393☆40Updated 2 years ago
- Open Processor Architecture☆26Updated 9 years ago
- An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.☆49Updated 11 years ago
- Simple RS232 UART☆12Updated 9 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆65Updated last week
- A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.☆35Updated 3 years ago
- VexRiscv-SMP integration test with LiteX.☆25Updated 4 years ago
- Xilinx Virtual Cable Daemon☆20Updated 5 years ago
- Small footprint and configurable Inter-Chip communication cores☆60Updated 2 weeks ago
- A small 32-bit implementation of the RISC-V architecture☆32Updated 4 years ago
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Updated 9 years ago
- Wishbone controlled I2C controllers☆50Updated 8 months ago
- Video Effects on VGA☆14Updated 6 years ago
- iDEA FPGA Soft Processor☆16Updated 9 years ago
- WISHBONE Builder☆14Updated 8 years ago
- a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially☆40Updated 9 years ago
- NeTV2 SoC based on LiteX☆16Updated 6 years ago
- Source code for reference designs applications☆22Updated 4 months ago
- ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 archite…☆77Updated 2 years ago
- an sata controller using smallest resource.☆16Updated 11 years ago
- Example code for the Numato Opsis board, the first HDMI2USB production board.☆50Updated 7 years ago
- FPGA reference design for the the Swerv EH1 Core☆71Updated 5 years ago
- PCB to breakout 8-lane PCI Express to SATA connectors, for use with FPGAs☆25Updated 11 years ago
- Altera Cyclone IV FPGA project for the PCIe LimeSDR board☆39Updated 2 years ago