tommythorn / yari
YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includes a complete SoC, simulator, GDB stub, scripts, and various examples.
☆44Updated 5 years ago
Related projects ⓘ
Alternatives and complementary repositories for yari
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 4 years ago
- SoftCPU/SoC engine-V☆54Updated last year
- Open Processor Architecture☆26Updated 8 years ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆15Updated last year
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Updated last year
- LEON2 SPARC CPU IP core LGPL by Gaisler Research☆18Updated 11 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆43Updated 2 years ago
- MR1 formally verified RISC-V CPU☆52Updated 5 years ago
- USB 1.1 Device IP Core☆18Updated 7 years ago
- There are many RISC V projects on iCE40. This one is mine.☆14Updated 4 years ago
- Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).☆33Updated 8 years ago
- Reusable Verilog 2005 components for FPGA designs☆36Updated last year
- Using VexRiscv without installing Scala☆36Updated 3 years ago
- CMod-S6 SoC☆36Updated 6 years ago
- ☆10Updated 5 years ago
- LatticeMico32 soft processor☆102Updated 10 years ago
- OpenGL-like graphics pipeline on a Xilinx FPGA☆30Updated 13 years ago
- A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.☆27Updated 4 years ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Small footprint and configurable Inter-Chip communication cores☆54Updated last month
- Freecores website☆19Updated 7 years ago
- FPGA implementation of DSITx (single lane) used in conjunction with ipod nano 7th gen display☆18Updated 6 years ago
- FPGA Development for the parallella☆19Updated 7 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆12Updated 5 years ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆53Updated 3 years ago
- SD device emulator from ProjectVault☆14Updated 5 years ago