sarachour / legno-compilerLinks
a compiler for the Apollo project that targets the HCDCv2 Analog Device
☆29Updated 4 years ago
Alternatives and similar repositories for legno-compiler
Users that are interested in legno-compiler are comparing it to the libraries listed below
Sorting:
- FPGA synthesis tool powered by program synthesis☆52Updated last month
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆161Updated last week
- A formally verified high-level synthesis tool based on CompCert and written in Coq.☆96Updated 2 months ago
- Languages, Tools, and Techniques for Accelerator Design☆33Updated 4 years ago
- RKQC is a compiler for reversible logic circuitry. The framework has been developed to compile high level circuit descriptions down to "Q…☆17Updated 9 years ago
- Search-based compiler for high-performance DSP programming☆69Updated last year
- Time-sensitive affine types for predictable hardware generation☆146Updated 3 weeks ago
- Verilog development and verification project for HOL4☆26Updated 7 months ago
- ☆40Updated 4 years ago
- Formal specification and verification of hardware, especially for security and privacy.☆127Updated 3 years ago
- Designs, infrastructure, and experiments around Race Logic☆25Updated 5 years ago
- A core language for rule-based hardware design 🦑☆165Updated last month
- ☆14Updated 2 years ago
- Pono: A flexible and extensible SMT-based model checker☆117Updated this week
- ☆26Updated 3 years ago
- A Parallel SAT Solver with GPU Accelerated Inprocessing☆136Updated 2 weeks ago
- A standard for floating point accuracy benchmarks☆55Updated last week
- A framework to ease parallelization of sequential SAT solvers☆26Updated 6 months ago
- CoreIR Symbolic Analyzer☆74Updated 5 years ago
- A generic test bench written in Bluespec☆56Updated 4 years ago
- A circuit toolkit☆106Updated 5 years ago
- UCLID5: formal modeling, verification, and synthesis of computational systems☆151Updated 4 months ago
- Create auto-scheduled data-parallel pipelines in hardware with user-friendly Python☆13Updated 4 years ago
- ☆30Updated 3 years ago
- A formal semantics of the RISC-V ISA in Haskell☆171Updated 2 years ago
- An advanced header-only exact synthesis library☆29Updated 3 years ago
- The source code to the Voss II Hardware Verification Suite☆56Updated this week
- State-of-the-art in reversible logic synthesis☆23Updated 9 years ago
- High-performance model counter☆50Updated last week
- C++ Library for Quantum State Preparation (QSP)☆13Updated 2 years ago