Compass-All / RaftLinks
Hardware-assisted Dynamic Information Flow Tracking for Runtime Protection on RISC-V
☆10Updated last year
Alternatives and similar repositories for Raft
Users that are interested in Raft are comparing it to the libraries listed below
Sorting:
- Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly☆15Updated 4 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆25Updated 3 weeks ago
- Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)☆69Updated 3 months ago
- Group administration repository for Tech: IOPMP Task Group☆13Updated 6 months ago
- MIRAGE (USENIX Security 2021)☆13Updated last year
- Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)☆64Updated 5 years ago
- Security Test Benchmark for Computer Architectures☆21Updated 4 months ago
- ☆25Updated 2 years ago
- RISC-V Security HC admin repo☆18Updated 6 months ago
- The MIT Sanctum processor top-level project☆30Updated 5 years ago
- CleanupSpec (MICRO-2019)☆17Updated 4 years ago
- ☆38Updated 2 years ago
- Spike with a coherence supported cache model☆13Updated last year
- A port of the RIPE suite to RISC-V.☆29Updated 6 years ago
- ☆32Updated 2 years ago
- RISC-V IOMMU Demo (Linux & Bao)☆21Updated last year
- RISC-V Security Model☆30Updated last week
- ☆34Updated last year
- Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.☆60Updated 5 years ago
- rfuzz: coverage-directed fuzzing for RTL research platform☆107Updated 3 years ago
- The artifact for SecSMT paper -- Usenix Security 2022☆27Updated 2 years ago
- This repository contains the hardware, software, and OS support for the Programmable Hardware Monitor (PHMon).☆26Updated 4 years ago
- rv8 benchmark suite☆20Updated 4 years ago
- ☆15Updated 2 years ago
- Data-centric defense mechanism against Spectre attacks. (DAC'19)☆11Updated 5 years ago
- ☆23Updated 4 months ago
- BUSted!!! Microarchitectural Side-Channel Attacks on the MCU Bus Interconnect☆11Updated last year
- This repository provides Pensieve, a security evaluation framework for microarchitectural defenses against speculative execution attacks.☆23Updated last year
- ☆88Updated last year
- A bare-metal application to test specific features of the risc-v hypervisor extension☆40Updated last year