Alternatives and similar repositories for tt05-psg-sn76489

Users that are interested in tt05-psg-sn76489 are comparing it to the libraries listed below

• efabless / clear
  ☆70Updated 10 months ago
• openXC7 / toolchain-installer
  Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7
  ☆85Updated 3 weeks ago
• meiniKi / FazyRV
  A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
  ☆95Updated last month
• zxmarcos / huedeon-gpu
  FPGA GPU design for DE1-SoC
  ☆72Updated 3 years ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆45Updated 4 months ago
• mole99 / greyhound-ihp
  Greyhound on IHP SG13G2 0.13 μm BiCMOS process
  ☆47Updated last month
• suarezvictor / CflexHDL
  Design digital circuits in C. Simulate really fast with a regular compiler.
  ☆174Updated 2 years ago
• FelipeFFerreira / ITA-CORES
  RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32
  ☆47Updated last year
• mattvenn / flipflop_demo
  Flip flop setup, hold & metastability explorer tool
  ☆36Updated 2 years ago
• ultraembedded / core_uriscv
  Another tiny RISC-V implementation
  ☆56Updated 3 years ago
• stnolting / neorv32-verilog
  ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
  ☆93Updated last week
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆81Updated 4 years ago
• bl0x / learn-fpga-amaranth
  Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL
  ☆107Updated 11 months ago
• mattvenn / vga-clock
  Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.
  ☆62Updated 3 years ago
• vmunoz82 / eda_tools
  A Dockerfile with a collections of ready to use open source EDA tools: Yosys, SimbiYosys (with Z3, boolector and Yices2), nextpnr-ice40, …
  ☆44Updated 2 years ago
• efabless / caravel_board
  ☆35Updated 8 months ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 3 years ago
• JulianKemmerer / PipelineC-Graphics
  Graphics demos
  ☆110Updated last year
• chili-chips-ba / openCologne
  Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…
  ☆66Updated this week
• aignacio / mpsoc_example
  ☆59Updated 3 years ago
• openXC7 / demo-projects
  Demo projects for various Kintex FPGA boards
  ☆60Updated last month
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆69Updated 3 years ago
• tomverbeure / rt
  A Full Hardware Real-Time Ray-Tracer
  ☆107Updated 2 years ago
• MichaelBell / tinyQV
  A Risc-V SoC for Tiny Tapeout
  ☆19Updated 4 months ago
• emard / ulx3s-misc
  Miscellaneous ULX3S examples (advanced)
  ☆78Updated 3 weeks ago
• Wren6991 / Hazard5
  5-stage RISC-V CPU, originally developed for RISCBoy
  ☆28Updated 2 years ago
• sam210723 / fpga
  Collection of projects for various FPGA development boards
  ☆45Updated last year
• BrunoLevy / TordBoyau
  A pipelined RISC-V processor
  ☆57Updated last year
• olofk / vidbo
  Virtual Development Board
  ☆60Updated 3 years ago
• splinedrive / my_hdmi_device
  New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…
  ☆98Updated last year