Alternatives and similar repositories for rt

Users that are interested in rt are comparing it to the libraries listed below

• smunaut / doom_riscv
  Doom classic port to lightweight RISC‑V
  ☆94Updated 2 years ago
• ToNi3141 / RasteriCEr
  Basic OpenGL 1.x implementation for small FPGAs (like iCE40UP5K)
  ☆37Updated 3 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 3 years ago
• JulianKemmerer / PipelineC-Graphics
  Graphics demos
  ☆110Updated last year
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆69Updated 3 years ago
• zxmarcos / huedeon-gpu
  FPGA GPU design for DE1-SoC
  ☆72Updated 3 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆80Updated 4 years ago
• emard / ulx3s-misc
  Miscellaneous ULX3S examples (advanced)
  ☆78Updated last week
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆44Updated 4 months ago
• Ravenslofty / 74xx-liberty
  ☆67Updated 2 years ago
• Kenji-Ishimaru / polyphony
  3D graphics rendering system for FPGA, the project contains hardware rasterizer, software geometry engine, and application middleware.
  ☆84Updated 4 years ago
• splinedrive / my_hdmi_device
  New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…
  ☆98Updated last year
• suarezvictor / CflexHDL
  Design digital circuits in C. Simulate really fast with a regular compiler.
  ☆173Updated 2 years ago
• dan-rodrigues / icestation-32
  Compact FPGA game console
  ☆163Updated last year
• RadionaOrg / ulx3s-links
  List of all links you can try with ULX3S
  ☆100Updated 3 years ago
• davidthings / tinyfpga_bx_usbserial
  USB Serial on the TinyFPGA BX
  ☆136Updated 4 years ago
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆113Updated 3 years ago
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆88Updated 6 years ago
• icebreaker-fpga / icebreaker-verilog-examples
  This repository contains small example designs that can be used with the open source icestorm flow.
  ☆147Updated 3 years ago
• RobertBaruch / nmigen-exercises
  Graded exercises for nMigen (WIP)
  ☆55Updated 4 years ago
• Wren6991 / Hazard5
  5-stage RISC-V CPU, originally developed for RISCBoy
  ☆27Updated last year
• matt-kimball / toygpu
  A simple GPU on a TinyFPGA BX
  ☆81Updated 6 years ago
• thinkoco / de10-nano-riscv
  A RISC-V SoC ( Hbird e203 ) on Terasic DE10-Nano
  ☆37Updated 4 years ago
• mrisc32 / mc1
  A computer (FPGA SoC) based on the MRISC32-A1 CPU
  ☆56Updated last year
• nullobject / sdram-fpga
  A FPGA core for a simple SDRAM controller.
  ☆119Updated 3 years ago
• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆82Updated last year
• Martoni / HdmiCore
  HDMI core in Chisel HDL
  ☆51Updated last year
• orangecrab-fpga / orangecrab-examples
  Example projects/code for the OrangeCrab
  ☆106Updated last year
• meiniKi / FazyRV
  A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
  ☆94Updated last week
• Domipheus / RPU
  Basic RISC-V CPU implementation in VHDL.
  ☆166Updated 4 years ago