Alternatives and similar repositories for RISC-V-Guide:

Users that are interested in RISC-V-Guide are comparing it to the libraries listed below

• litex-hub / linux-on-litex-vexriscv
  Linux on LiteX-VexRiscv
  ☆596Updated 5 months ago
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,456Updated 2 weeks ago
• riscv / learn
  Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.
  ☆596Updated last month
• splinedrive / kianRiscV
  RISC-V Linux SoC, marchID: 0x2b
  ☆724Updated this week
• riscv-non-isa / riscv-arch-test
  ☆524Updated last month
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆882Updated 3 years ago
• stevehoover / LF-Building-a-RISC-V-CPU-Core
  ☆352Updated 10 months ago
• XUANTIE-RV / openc906
  OpenXuantie - OpenC906 Core
  ☆324Updated 5 months ago
• Wren6991 / Hazard3
  3-stage RV32IMACZb* processor with debug
  ☆737Updated this week
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,295Updated 3 years ago
• stnolting / neorv32
  A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent …
  ☆1,627Updated this week
• syntacore / scr1
  SCR1 is a high-quality open-source RISC-V MCU core in Verilog
  ☆882Updated last month
• riscv-software-src / riscv-tests
  ☆910Updated 3 weeks ago
• YosysHQ / oss-cad-suite-build
  Multi-platform nightly builds of open source digital design and verification tools
  ☆883Updated this week
• riscv / riscv-debug-spec
  Working Draft of the RISC-V Debug Specification Standard
  ☆463Updated last week
• jameslzhu / riscv-card
  An unofficial assembly reference for RISC-V.
  ☆461Updated last month
• riscv-software-src / opensbi
  RISC-V Open Source Supervisor Binary Interface
  ☆1,054Updated this week
• openhwgroup / cvw
  CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…
  ☆282Updated this week
• chipsalliance / Cores-VeeR-EH1
  VeeR EH1 core
  ☆831Updated last year
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,177Updated 5 months ago
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,410Updated last week
• sergeykhbr / riscv_vhdl
  Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
  ☆631Updated last month
• sifive / freedom-tools
  Tools for SiFive's Freedom Platform
  ☆215Updated 3 years ago
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,530Updated last month
• riscv / riscv-fast-interrupt
  Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
  ☆253Updated this week
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆598Updated 2 months ago
• YosysHQ / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆3,177Updated 5 months ago
• trabucayre / openFPGALoader
  Universal utility for programming FPGA
  ☆1,237Updated this week
• hughperkins / VeriGPU
  OpenSource GPU, in Verilog, loosely based on RISC-V ISA
  ☆854Updated 3 weeks ago
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,148Updated last month