Alternatives and similar repositories for FPGA_BitonicSorting

Users that are interested in FPGA_BitonicSorting are comparing it to the libraries listed below

• monotone-RK / FACE
  FACE: Fast and Customizable Sorting Accelerator
  ☆11Updated 9 years ago
• gem5-graphics / gem5-graphics
  gem5 simulator with a gpgpu+graphics GPU model
  ☆61Updated 5 years ago
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆186Updated last month
• SFU-HiAccel / rodinia-hls
  FPGA version of Rodinia in HLS C/C++
  ☆40Updated 4 years ago
• KastnerRG / spector
  Spector: An OpenCL FPGA Benchmark Suite
  ☆48Updated 6 years ago
• Xilinx / gemx
  Matrix Operation Library for FPGA https://xilinx.github.io/gemx/
  ☆63Updated 6 years ago
• Xilinx / ACCL
  Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
  ☆97Updated 5 months ago
• DebashisGanguly / gpgpu-sim_UVMSmart
  ☆79Updated 5 years ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆80Updated 6 years ago
• Xtra-Computing / ThunderGP
  HLS-based Graph Processing Framework on FPGAs
  ☆150Updated 3 years ago
• PrincetonUniversity / accelerator-wall
  Repository for the tools and non-commercial data used for the "Accelerator wall" paper.
  ☆51Updated 6 years ago
• Xilinx / HLS_arbitrary_Precision_Types
  ☆47Updated 2 years ago
• Multi2Sim / multi2sim
  Multi2Sim source code
  ☆132Updated 6 years ago
• accel-sim / gpgpu-sim_distribution
  GPGPU-Sim provides a detailed simulation model of a contemporary GPU running CUDA and/or OpenCL workloads and now includes an integrated…
  ☆67Updated last month
• m-asiatici / MSHR-rich
  A multi-banked non-blocking cache that handles efficiently thousands of outstanding misses, especially suited for bandwidth-bound latency…
  ☆21Updated 4 years ago
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆42Updated 2 years ago
• RC4ML / Shuhai
  Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…
  ☆117Updated 5 months ago
• CMU-SAFARI / GPGPUSim-Ramulator
  The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…
  ☆58Updated 6 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆96Updated last year
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆71Updated last year
• CMU-SAFARI / VAMPIRE
  An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …
  ☆40Updated 6 years ago
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆40Updated last year
• sstsimulator / sst-elements
  SST Architectural Simulation Components and Libraries
  ☆108Updated last week
• CMU-SAFARI / SparseP
  SparseP is the first open-source Sparse Matrix Vector Multiplication (SpMV) software package for real-world Processing-In-Memory (PIM) ar…
  ☆77Updated 3 years ago
• upmem / dpu_demo
  Examples of DPU programs using the UPMEM DPU SDK
  ☆45Updated 10 months ago
• TeCSAR-UNCC / gem5-SALAM
  ☆106Updated last year
• Krishnaps / Gem5-PCI-Express
  Gem5 with PCI Express integrated.
  ☆22Updated 7 years ago
• CSA-infra / RISCV-Scalable-Simulation-tutorial
  ☆13Updated 6 months ago
• harvard-acc / ALADDIN
  A pre-RTL, power-performance model for fixed-function accelerators
  ☆181Updated last year
• cdsc-github / parade-ara-simulator
  PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration
  ☆48Updated 3 years ago