CNN-to-FPGA-framework for small CNN, written in VHDL and Python
☆24Jun 8, 2021Updated 4 years ago
Alternatives and similar repositories for pocket-cnn
Users that are interested in pocket-cnn are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ONNX Compiler for deep learning inference and training in FPGA SOC☆24Apr 18, 2026Updated last month
- VHDL package for reading formatted data from comma-separated-values (CSV) files☆23Sep 10, 2013Updated 12 years ago
- pyVhdl2sch is a python based VHDL to (pdf) schematic converter☆33Oct 20, 2019Updated 6 years ago
- AUTOMATIC VHDL GENERATION FOR CNN MODELS☆32Nov 16, 2022Updated 3 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A simple spidergon network-on-chip with wormhole switching feature☆12Mar 22, 2021Updated 5 years ago
- serial com api☆38Dec 17, 2020Updated 5 years ago
- Triple Modular Redundancy☆30Sep 4, 2019Updated 6 years ago
- A HARDWARE IMPLEMENTATION OF ARTIFICIAL NEURAL NETWORKS FOR INFERENCE☆34Mar 10, 2020Updated 6 years ago
- Transfer data from DDR memory to AXI4-Stream Data FIFO and back through AXI DMA☆23May 20, 2019Updated 7 years ago
- This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…☆21Feb 27, 2024Updated 2 years ago
- Tutorial on how to boot Zephyr on the Avnet/Digilent Zedboard, includes building a FPGA bitstream and the First Stage Boot Loader (FSBL)☆19Sep 21, 2024Updated last year
- Demo for Melexis MLX90640 sensor using mikromedia 7 for STM32F7☆19Dec 9, 2021Updated 4 years ago
- NIOSDuino - Arduino framework running on NIOS II☆18Apr 14, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Go Board FPGA Project for Ambient Light Sensor in VHDL and Verilog☆10Apr 20, 2019Updated 7 years ago
- Simple Python Module to access PCIe Endpoint BARs☆23Dec 15, 2025Updated 5 months ago
- ECE563 Final Project - FPGA based camera tracking☆18Dec 17, 2013Updated 12 years ago
- RISCV CPU implementation in SystemVerilog☆32Updated this week
- Angular 7/8/9 Application with PHP Back-End Example☆12Mar 4, 2020Updated 6 years ago
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- Repository for work on on Xilinx's matrix vector activation unit's RTL implementation. Documentation available at: https://asadalam.githu…☆20Jan 21, 2022Updated 4 years ago
- ☆12Aug 22, 2021Updated 4 years ago
- A little demo how to bind an advanced data science algorithms to 4 different languages☆10Nov 6, 2018Updated 7 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- An example of a common Wi-Fi set up scenario on ESP32 using Rust☆17Mar 29, 2024Updated 2 years ago
- SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model☆16Jan 29, 2024Updated 2 years ago
- A library of VHDL components for Neural Networks☆21Sep 23, 2021Updated 4 years ago
- ☆12Oct 8, 2020Updated 5 years ago
- ☆13Mar 2, 2023Updated 3 years ago
- Loam system models☆16Dec 30, 2019Updated 6 years ago
- DCGAN that converts raw guitar sound into effector modified sound.☆19Mar 28, 2021Updated 5 years ago
- Caffe to VHDL☆68Jun 17, 2020Updated 5 years ago
- A MIPS32 CPU implemented by VHDL☆30Apr 28, 2013Updated 13 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Convolutional Neural Network (CNN) image classification of handwritten digits in Xilinx FPGA☆14Sep 12, 2019Updated 6 years ago
- ☆18Mar 26, 2022Updated 4 years ago
- asynchronous I/O in Rust☆14Jan 8, 2017Updated 9 years ago
- PNG encoder, implemented in VHDL☆23Mar 30, 2024Updated 2 years ago
- A lightweight header-only c++ library for real time audio applications, oriented to the embedded world.☆18Jul 23, 2021Updated 4 years ago
- Single Image Haze Removal Using AODNet in Pytorch☆15Mar 5, 2021Updated 5 years ago
- Governance-related CHIPS Alliance documents, guides etc.☆10Feb 20, 2023Updated 3 years ago