marmolejo / zet
Open source implementation of a x86 processor
☆321Updated 7 years ago
Alternatives and similar repositories for zet
Users that are interested in zet are comparing it to the libraries listed below
Sorting:
- 80186 compatible SystemVerilog CPU core and FPGA reference design☆395Updated last year
- GPL v3 2D/3D graphics engine in verilog☆665Updated 10 years ago
- mor1kx - an OpenRISC 1000 processor IP core☆530Updated last month
- The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.☆370Updated 10 years ago
- A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz☆413Updated this week
- TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. De…☆145Updated 8 years ago
- A Verilog HDL model of the MOS 6502 CPU☆340Updated 2 years ago
- Small footprint and configurable DRAM core☆413Updated last week
- OpenRISC 1200 implementation☆166Updated 9 years ago
- RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)☆323Updated 3 years ago
- A simple RISC-V processor for use in FPGA designs.☆273Updated 8 months ago
- A 32-bit Microcontroller featuring a RISC-V core☆152Updated 7 years ago
- Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools☆124Updated 9 years ago
- Small footprint and configurable PCIe core☆542Updated 2 weeks ago
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆652Updated 5 months ago
- The Zylin ZPU☆243Updated 10 years ago
- Basic RISC-V CPU implementation in VHDL.☆167Updated 4 years ago
- IBM PC Compatible SoC for a commercially available FPGA board☆70Updated 8 years ago
- RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance☆366Updated last year
- A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals☆238Updated 6 years ago
- RISC-V Formal Verification Framework☆601Updated 3 years ago
- RISC-V CPU Core☆324Updated 11 months ago
- The root repo for lowRISC project and FPGA demos.☆598Updated last year
- public domain tools for FPGAs☆327Updated 8 years ago
- ☆247Updated 2 years ago
- NES in Verilog☆197Updated 4 years ago
- A Video display simulator☆167Updated 9 months ago
- Linux on LiteX-VexRiscv☆635Updated last month
- A full-speed device-side USB peripheral core written in Verilog.☆231Updated 2 years ago
- The original high performance and small footprint system-on-chip based on Migen™☆326Updated 2 months ago