archlabo / Frix
IBM PC Compatible SoC for a commercially available FPGA board
☆68Updated 8 years ago
Alternatives and similar repositories for Frix:
Users that are interested in Frix are comparing it to the libraries listed below
- Reverse engineering the XC2064 FPGA☆74Updated 3 years ago
- The OpenCores ao68000 IP Core is a Motorola MC68000 binary compatible processor.☆77Updated 13 years ago
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆31Updated 8 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆61Updated 6 years ago
- A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set☆60Updated 3 months ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆68Updated 2 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆43Updated 2 years ago
- LatticeMico32 soft processor☆105Updated 10 years ago
- Documenting the Anlogic FPGA bit-stream format.☆86Updated 2 years ago
- A CPU on an FPGA that you can play Zork on☆49Updated 8 years ago
- SoftCPU/SoC engine-V☆54Updated 2 weeks ago
- ☆51Updated 7 years ago
- ☆73Updated 5 months ago
- A simple GPU on a TinyFPGA BX☆82Updated 6 years ago
- A repository for a random collection of stuff pertaining to reverse engineering the Pano Logic G2 "zero" client☆34Updated 6 years ago
- A FPGA core for a simple SDRAM controller.☆118Updated 3 years ago
- mystorm sram test☆27Updated 7 years ago
- Miscellaneous ULX3S examples (advanced)☆77Updated last month
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆51Updated last year
- J-Core J2/J32 5 stage pipeline CPU core☆51Updated 4 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆37Updated 2 years ago
- PanoLogic Zero Client G1 reverse engineering info☆72Updated last year
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆86Updated 6 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆79Updated 4 years ago
- ☆13Updated 2 years ago
- 🔌 CPU86 - Free VHDL CPU8088 IP core - ported to Papilio and Max1000 FPGA☆44Updated 3 months ago
- The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.☆62Updated 7 years ago
- The aoR3000 is a MIPS R3000A compatible core capable of booting the Linux kernel version 3.16 in about 3 seconds and with a rating of 48.…☆42Updated 10 years ago
- OpenSPARC-based SoC☆65Updated 10 years ago
- Tiny tips for Colorlight i5 FPGA board☆56Updated 4 years ago