archlabo / FrixLinks
IBM PC Compatible SoC for a commercially available FPGA board
☆72Updated 8 years ago
Alternatives and similar repositories for Frix
Users that are interested in Frix are comparing it to the libraries listed below
Sorting:
- The OpenCores ao68000 IP Core is a Motorola MC68000 binary compatible processor.☆78Updated 13 years ago
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆33Updated 8 years ago
- Reverse engineering the XC2064 FPGA☆81Updated 4 years ago
- 🔌 CPU86 - Free VHDL CPU8088 IP core - ported to Papilio and Max1000 FPGA☆45Updated last month
- The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.☆386Updated 11 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆44Updated 2 years ago
- LatticeMico32 soft processor☆107Updated 11 years ago
- PanoLogic Zero Client G1 reverse engineering info☆74Updated last year
- A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set☆63Updated 4 months ago
- Pano Logic G2 Reverse Engineering Project☆144Updated 4 years ago
- An attempt at a small Verilog implementation of the original Apple 1 on an FPGA☆146Updated 2 weeks ago
- A simple GPU on a TinyFPGA BX☆81Updated 7 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆62Updated 6 years ago
- Documenting the Anlogic FPGA bit-stream format.☆88Updated 2 years ago
- ☆53Updated 8 years ago
- IceChips is a library of all common discrete logic devices in Verilog☆146Updated last week
- ☆74Updated 3 months ago
- A FPGA core for a simple SDRAM controller.☆123Updated 3 years ago
- Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools☆126Updated 9 years ago
- ☆69Updated 2 years ago
- iCE40HX8K development board with SRAM and bus for fast ADC, DAC, IOs☆38Updated 11 months ago
- mystorm sram test☆28Updated 8 years ago
- ☆28Updated 9 years ago
- A very simple RISC-V ISA emulator.☆38Updated 4 years ago
- J-Core J2/J32 5 stage pipeline CPU core☆54Updated 4 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Updated 3 years ago
- Software, Firmware and documentation for the myStorm BlackIce-II board☆71Updated 4 years ago
- FPGA USB 1.1 Low-Speed Implementation☆34Updated 7 years ago
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆59Updated 2 years ago
- Microprogrammed 65C02-compatible FPGA Processor Core (Verilog-2001)☆55Updated 9 years ago