Alternatives and similar repositories for ecdsa

Users that are interested in ecdsa are comparing it to the libraries listed below

• scluconn / LPN-based_PUF
  FPGA implementation of a cryptographically secure physical unclonable function based on learning parity with noise problem.
  ☆15Updated 8 years ago
• lowRISC / ot-sca
  Side-channel analysis setup for OpenTitan
  ☆37Updated 3 months ago
• canaknesil / 4x4-apuf
  An FPGA Implementation of Arbiter PUF with 4x4 Switch Blocks
  ☆16Updated 5 years ago
• sebastien-riou / masked-bit-sliced-aes-128
  masked, bit-sliced AES-128 demo code
  ☆14Updated last year
• p4r4xor / Montgomery1024
  Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation
  ☆13Updated 6 years ago
• ljhsiun2 / EllipticCurves_SystemVerilog
  Elgamal's over Elliptic Curves
  ☆20Updated 7 years ago
• GLADICOS / AES128
  AES128 is a IP crypto core using modes ECB/CBC/CTR using vpi to functional verification
  ☆17Updated 2 years ago
• colinoflynn / xdomain-dpa-m23
  Cross-Domain DPA Attack on SAML11
  ☆17Updated 6 years ago
• knarfrank / Higher-Order-Masked-AES-128
  Higher-order Masking of AES-128 based on the Rivain and Prouff method, CPRR method and Common Shares with Random Reduction method.
  ☆14Updated 8 years ago
• Crimsonninja / senior_design_puf
  Repository to store all design and testbench files for Senior Design
  ☆22Updated 5 years ago
• Gabalo / RO_PUF
  Ring Oscillator Physically Unclonable Funtion
  ☆26Updated 4 years ago
• sabbaghm / c-ll-verilog
  An LLVM based mini-C to Verilog High-level Synthesis tool
  ☆39Updated 10 months ago
• ascon / ascon-hardware
  NIST LWC Hardware Reference Implementation of Ascon v1.2
  ☆31Updated 2 years ago
• shiva-t / Elliptical-Curve-Cryptography-FPGA
  Implementation of ECC on FPGA-Zynq7000 SoC
  ☆19Updated 6 years ago
• scluconn / DA_PUF_Library
  Defense/Attack PUF Library (DA PUF Library)
  ☆55Updated 5 years ago
• zdszx / Modexpowering3
  a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier
  ☆25Updated 3 years ago
• eriksargent / PUF-lab
  FPGA implementation of a physical unclonable function for authentication
  ☆33Updated 8 years ago
• ANSSI-FR / IPECC
  A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration
  ☆46Updated 2 months ago
• secworks / trng
  True Random Number Generator core implemented in Verilog.
  ☆79Updated 5 years ago
• ATaylorCEngFIET / introduction_to_vivado
  ☆21Updated 2 years ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆37Updated 5 years ago
• fatestudio / RSA4096
  4096bit RSA project, with verilog code, python test code, etc
  ☆47Updated 6 years ago
• petrsocha / sicak
  SIde-Channel Analysis toolKit: embedded security evaluation tools
  ☆30Updated 4 years ago
• lajanugen / Modular-Exponentiation
  Verilog Implementation of modular exponentiation using Montgomery multiplication
  ☆37Updated 11 years ago
• IamVNIE / Hardware-Security
  Hardware Security Labs
  ☆31Updated 8 years ago
• siamumar / BIST_PUF_TRNG
  A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators
  ☆24Updated 8 years ago
• hyperpicc / ecc
  Verilog HDL implementation of Elliptic Curve Cryptography (ECC) over GF(2^163)
  ☆22Updated 8 years ago
• secworks / modexp
  Modular Exponentiation core written i Verilog. Supports key lengths between 32 and 8192 bits.
  ☆17Updated 5 years ago
• FlorentCLMichel / karatsuba_multiplication_verilog
  A simple implementation of the Karatsuba multiplication algorithm
  ☆11Updated 10 months ago
• ikizhvatov / pysca
  Toolbox for advanced differential power analysis of symmetric key cryptographic algorithm implementations
  ☆50Updated 7 years ago